G. Boccardi

Ultimate nano-electronics

Jerome Mitard, Rita Rooyackers, Anne Vandooren, 2015 .

Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm

C. Merckling, N. Waldron, N. Collaert, 2016, 2016 IEEE Symposium on VLSI Technology.

Performance and electrostatic improvement by high-pressure anneal on Si-passivated strained Ge pFinFET and gate all around devices with superior NBTI reliability

L. Witters, D. Mocuta, N. Collaert, 2017, 2017 Symposium on VLSI Technology.

A Novel Fully Self-Aligned SiGe:C HBT Architecture Featuring a Single-Step Epitaxial Collector-Base Process

G.A.M. Hurkx, S. Decoutere, T. Vanhoucke, 2007, 2007 IEEE International Electron Devices Meeting.

A VFB tunable Single Metal Single Dielectric approach using As I/I into TiN/HfO2 for 32nm node and beyond

G. Boccardi, R. Singanamalla, J. Tseng, 2009, 2009 International Symposium on VLSI Technology, Systems, and Applications.

Highly scalable effective work function engineering approach for multi-VT modulation of planar and FinFET-based RMG high-k last devices for (Sub-)22nm nodes

E. Simoen, E. Vecchio, H. Bender, 2013, 2013 Symposium on VLSI Technology.

An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

C. Merckling, D. Lin, N. Waldron, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

A. Vais, C. Merckling, N. Waldron, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).