D. Varghese

Simulation and modeling of hot carrier degradation of cascoded NMOS transistors for power management applications

S. Krishnan, D. Varghese, G. Mathur, 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).

TCAD analysis of HCS degradation in LDMOS devices under AC stress conditions

A. Gnudi, S. Poli, D. Varghese, 2014, 2014 44th European Solid State Device Research Conference (ESSDERC).

Device Design and Optimization Considerations for Bulk FinFETs

D. Varghese, V. Rao, D. Varghese, 2008, IEEE Transactions on Electron Devices.

Recent Issues in Negative-Bias Temperature Instability: Initial Degradation, Field Dependence of Interface Trap Generation, Hole Trapping Effects, and Relaxation

S. Mahapatra, H. Kufluoglu, D. Varghese, 2007, IEEE Transactions on Electron Devices.

Energy driven modeling of OFF-state and sub-threshold degradation in scaled NMOS transistors

D. Varghese, V. Reddy, M. Nandakumar, 2014, 2014 IEEE International Reliability Physics Symposium.

off-State Degradation in Drain-Extended NMOS Transistors: Interface Damage and Correlation to Dielectric Breakdown

H. Shichijo, H. Kufluoglu, D. Varghese, 2007, IEEE Transactions on Electron Devices.

Negative bias temperature instability in CMOS devices

Souvik Mahapatra, Dipankar Saha, D. Varghese, 2005 .

Multi-probe experimental and 'bottom-up' computational analysis of correlated defect generation in modern nanoscale transistors

D. Varghese, Muhammad A. Alam, 2009 .

Theory of Breakdown Position Determination by Voltage- and Current-Ratio Methods

B. Kaczer, D. Varghese, M.A. Alam, 2008, IEEE Transactions on Electron Devices.