Y. Hayashi

Power controllable region of a power conversion system for SMES by use of a single natural commutation converter and an ICB energy transfer circuit

J. Baba, T. Nitta, Y. Shirai, 2004, IEEE Transactions on Applied Superconductivity.

Performance Modeling of Low-$k$/Cu Interconnects for 32-nm-Node and Beyond

M. Tada, Y. Hayashi, N. Inoue, 2009, IEEE Transactions on Electron Devices.

Power system harmonic analysis using state-estimation method for Japanese field data

J. Matsuki, Y. Hayashi, M. Mizukami, 2005, IEEE Transactions on Power Delivery.

4kb nonvolatile nanogap memory (NGpM) with 1 ns programming capability

T. Takahashi, Y. Hayashi, T. Sumiya, 2012, 2012 IEEE Silicon Nanoelectronics Workshop (SNW).

Interconnect design strategy: structures, repeaters and materials toward 0.1 /spl mu/m ULSIs with a giga-hertz clock operation

Y. Hayashi, S. Takahashi, M. Edahiro, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

High-speed optical protection system using MEMS optical switch triggered by SONET performance monitor

H. Tsushima, Y. Hayashi, S. Kakizaki, 2001, OFC 2001. Optical Fiber Communication Conference and Exhibit. Technical Digest Postconference Edition (IEEE Cat. 01CH37171).

Thermally robust 90 nm node Cu-Al wiring technology using solid phase reaction between Cu and Al

Y. Matsubara, Y. Hayashi, M. Komuro, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

A 1 Mbit EEPROM with MONOS memory cell for semiconductor disk application

T. Tsuchiya, Y. Hayashi, T. Tanaka, 1990, Digest of Technical Papers., 1990 Symposium on VLSI Circuits.