Martin Rozkovec

发表

Application dependent FPGA testing method using compressed deterministic test vectors

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2010, 2010 IEEE 16th International On-Line Testing Symposium.

Relocation of reconfigurable modules on Xilinx FPGA

Martin Rozkovec, Ondrej Novák, Tomas Drahonovsky, 2013, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Polynomial Based NUC Implemented on FPGA

Martin Rozkovec, Jirí Bucek, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

Sequential Test Decompressors with Fast Tester Bits Wide-Spreading

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2017, J. Circuits Syst. Comput..

Test pattern decompression in parallel scan chain architecture

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2013, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Implementation ofDynamically Reconfigurable Test Architecture forFPGACircuits

Martin Rozkovec, 2008 .

Implementation of Dynamically Reconfigurable Test Architecture for FPGA Circuits

Martin Rozkovec, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

Sequential test decompressors with fast variable wide spreading

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2016, 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

GNU/Linux and reconfigurable multiprocessor FPGA platform

Martin Rozkovec, Tomas Drahonovsky, Petr Cvek, 2013, 2013 IEEE 11th International Workshop of Electronics, Control, Measurement, Signals and their application to Mechatronics.

Application Dependent FPGA Testing Method

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

A highly flexible reconfigurable system on a Xilinx FPGA

Martin Rozkovec, Ondrej Novák, Tomas Drahonovsky, 2014, 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14).

Decompressors using nonlinear codes

Martin Rozkovec, Jan Pliva, Ondřej Novák, 2020, Microprocess. Microsystems.

Combinational Decompressors with Nonlinear Codes

Martin Rozkovec, Ondřej Novák, Jan Pliva, 2019, 2019 22nd Euromicro Conference on Digital System Design (DSD).

Test vector overlapping based compression tool for narrow test access mechanism

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor Outputs

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2015, 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Detecting LWIR filters using hyperspectral camera and neural networks

Martin Rozkovec, Jiří Čech, 2017, 2017 International Conference on Applied Electronics (AE).

Test-data compression with low number of channels and short test time

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Test compression for circuits with multiple scan chains

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2015, 2015 16th Latin-American Test Symposium (LATS).

Structural test of programmed FPGA circuits

Martin Rozkovec, Ondrej Novák, 2009, 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Test Decompressor Effectivity Improvement

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

An evaluation of the application dependent FPGA test method

Martin Rozkovec, Jiri Jenícek, Ondrej Novák, 2012, 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).