Daniel Sánchez

Modeling the impact of permanent faults in caches

José M. García, Daniel Sánchez, Yiannakis Sazeides, 2013, ACM Trans. Archit. Code Optim..

A fault-tolerant architecture for parallel applications in tiled-CMPs

José M. García, Daniel Sánchez, Juan L. Aragón, 2011, The Journal of Supercomputing.

Efficient inter-core power and thermal balancing for multicore processors

Stefanos Kaxiras, Daniel Sánchez, Juan M. Cebrian, 2012, Computing.

Managing power constraints in a single-core scenario through power tokens

Stefanos Kaxiras, Daniel Sánchez, Juan M. Cebrian, 2013, The Journal of Supercomputing.

An analytical model for the calculation of the Expected Miss Ratio in faulty caches

José M. García, Daniel Sánchez, Yiannakis Sazeides, 2011, 2011 IEEE 17th International On-Line Testing Symposium.

Soft-error mitigation by means of decoupled transactional memory threads

José M. García, Daniel Sánchez, Juan M. Cebrian, 2015, Distributed Computing.

A log-based redundant architecture for reliable parallel computation

José M. García, Daniel Sánchez, Juan L. Aragón, 2010, 2010 International Conference on High Performance Computing.

REPAS: Reliable Execution for Parallel ApplicationS in Tiled-CMPs

José M. García, Daniel Sánchez, Juan L. Aragón, 2009, Euro-Par.