Jason Loew

Customized architectures for faster route finding in GPS-based navigation systems

Dmitry V. Ponomarev, Patrick H. Madden, Jason Loew, 2010, 2010 IEEE 8th Symposium on Application Specific Processors (SASP).

Aggressive Scheduling and Speculation in Multithreaded Architectures: Is it Worth its Salt?

Dmitry V. Ponomarev, Jason Loew, 2008, 2008 20th International Symposium on Computer Architecture and High Performance Computing.

Reducing register pressure in SMT processors through L2-miss-driven early register release

Joseph J. Sharkey, Dmitry V. Ponomarev, Jason Loew, 2008, TACO.

Improving sequential code performance in multicore and multithreaded processors

Jason Loew, Dmitry Ponomarev, 2012 .

A co-processor approach for accelerating data-structure intensive algorithms

Dmitry V. Ponomarev, Jesse Elwell, Patrick H. Madden, 2010, 2010 IEEE International Conference on Computer Design.

TPM-SIM: A framework for performance evaluation of Trusted Platform Modules

Nael B. Abu-Ghazaleh, Dmitry V. Ponomarev, Jesse Elwell, 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

Two-Level Reorder Buffers: Accelerating Memory-Bound Applications on SMT Architectures

Dmitry V. Ponomarev, Jason Loew, 2008, 2008 37th International Conference on Parallel Processing.

Mathematical limits of parallel computation for embedded systems

Dmitry V. Ponomarev, Jesse Elwell, Patrick H. Madden, 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

Non-monopolizable caches: Low-complexity mitigation of cache side channel attacks

Nael B. Abu-Ghazaleh, Aamer Jaleel, Dmitry V. Ponomarev, 2012, TACO.