M. Valero-Garcia

A study of the communication cost of the FFT on torus multicomputers

L.D. de Cerio, M. Valero-Garcia, A. Gonzalez, 1995, Proceedings 1st International Conference on Algorithms and Architectures for Parallel Processing.

Systematic hardware adaptation of systolic algorithms

M. Valero-Garcia, M. Valero, J. J. Navarro, 1989, ISCA '89.

Systematic design of two-level pipelined systolic arrays with data contraflow

M. Valero-Garcia, J.M. Llaberia, M. Valero, 1988, 1988., IEEE International Symposium on Circuits and Systems.

Implementation of systolic algorithms using pipelined functional units

M. Valero-Garcia, J.M. Llaberia, M. Valero, 1990, [1990] Proceedings of the International Conference on Application Specific Array Processors.