Dan Oh

发表

Investigation of power & ground co-reference for high-speed signal in package design

Jianmin Zhang, Siow Chek Tan, Hong Shi, 2013, 2013 IEEE International Symposium on Electromagnetic Compatibility.

Challenges and solutions for next generation main memory systems

Dan Oh, Joong-Ho Kim, Ravi Kollipara, 2009, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.

Impact of Die Pin Capacitance and Package Crosstalk on DDR4 Channel Jitter

Hui Liu, Dan Oh, Janani Chandrasekhar, 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

Improving the target impedance method for PCB decoupling of core power

Dan Oh, Guang Chen, D. Oh, 2014, 2014 IEEE 64th Electronic Components and Technology Conference (ECTC).

Performance Analysis of Edge-based DFE

Jihong Ren, Dan Oh, V. Stojanovic, 2006, 2006 IEEE Electrical Performane of Electronic Packaging.

Analysis and comparison of DDR3/DDR4 clock duty-cycle-distortion (DCD) for UDIMM and discrete SDRAM component configurations

Dan Oh, Gawon Kim, June Feng, 2016, IEEE Electromagnetic Compatibility Magazine.

Timing analysis for wide IO memory interface applications with silicon interposer

Dan Oh, Arif Rahman, Karthik Chandrasekar, 2014, 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC).

Prediction of System Performance Based on Component Jitter and Noise Budgets

Dan Oh, Chuck Yuan, JiHong Ren, 2007, 2007 IEEE Electrical Performance of Electronic Packaging.

Arria™ 10 device architecture

Martin Langhammer, Dan Oh, David M. Lewis, 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).

Coupling impact of single ended signals to LVDS interface

Dan Oh, Guang Chen, June Feng, 2014, 2014 IEEE 64th Electronic Components and Technology Conference (ECTC).

A novel flexible on-die decoupling scheme using package interconnects

Hui Liu, Hong Shi, Dan Oh, 2013, 2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems.

S-parameters Based Transmission Line Modeling with Accurate Low-Frequency Response

Dan Oh, Joong-Ho Kim, Chuck Yuan, 2006, 2006 IEEE Electrical Performane of Electronic Packaging.

Numerical conditional probability density function and its application in jitter analysis

Dan Oh, Yunhui Chu, Rob Friar, 2017, 2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI).

Jitter Amplification Considerations for PCB Clock Channel Design

Dan Oh, Chuck Yuan, C. Madden, 2007, 2007 IEEE Electrical Performance of Electronic Packaging.

In-situ characterization of 3D package systems with on-chip measurements

Dan Oh, Ling Yang, Hai Lan, 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

Power integrity analysis for core timing models

Dan Oh, Yujeong Shim, 2014, 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC).

System design considerations for a 5Gb/s source-synchronous link with common-mode clocking

Jared Zerbe, Jihong Ren, Dan Oh, 2011, 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems.

High-speed I/O jitter modeling methodologies

Jihong Ren, Dan Oh, Sam Chang, 2010, 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems.

Study of Advanced Fan-Out Packages for Mobile Applications

Kilsoo Kim, Dan Oh, Eunseok Song, 2018, 2018 IEEE 68th Electronic Components and Technology Conference (ECTC).

Power integrity characterization and correlation of 3D package systems using on-chip measurements

Dan Oh, Joong-Ho Kim, Ling Yang, 2010, 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems.

Challenges in extending single-ended graphics memory data rates

Dan Oh, A. Vaidyanath, S. Mukherjee, 2012, 2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems.

Impact of dynamic power supply noise induced by clock networks on clock jitter and timing margin

Dan Oh, Yujeong Shim, 2016, 2016 IEEE International Symposium on Electromagnetic Compatibility (EMC).

Supply noise induced jitter modeling and optimization for high-speed interfaces

Guang Chen, Dan Oh, Yujeong Shim, 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).

Equalization of mid-frequency power supply noise via a spectrum-shaping encoder for parallel buses

John Eble, Lei Luo, Jihong Ren, 2009, 2009 59th Electronic Components and Technology Conference.

Hybrid Statistical Link Simulation Technique

Jihong Ren, Dan Oh, Sam Chang, 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Accurate System Voltage and Timing Margin Simulation in CDR Based High Speed Designs

Qi Lin, Dan Oh, Chuck Yuan, 2006, 2006 IEEE Electrical Performane of Electronic Packaging.

System-level clock jitter modeling for DDR systems

Dan Oh, Mayra Sarmiento, Yujeong Shim, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Optimizing the timing center for high-speed parallel buses

Dan Oh, Woopoung Kim, C. Madden, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Design and characterization of a 12.8GB/s low power differential memory system for mobile applications

Brian Leibowitz, Dan Oh, Joong-Ho Kim, 2009, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.

Optimization of PCB PDN design using enhanced VRM model

Dan Oh, Guang Chen, Zhiwei Liu, 2014, 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC).

Validation of reduced-terminal models in fast SSN analysis

Dan Oh, Xinhai Jiang, 2012, 2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems.

Channel timing error analysis for DDR2 memory systems

Dan Oh, Ling Yang, C. Yuan, 2005, IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005..

A jitter equalization technique for minimizing supply noise induced jitter in high speed serial links

Dan Oh, Yujeong Shim, Tim Hoang, 2014, 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC).

Design of low cost QFP packages for multi-gigabit memory interface

Yi Lu, Dan Oh, Joong-Ho Kim, 2009, 2009 59th Electronic Components and Technology Conference.

Impact of Channel Loading to Power Distribution Network Designs

Dan Oh, Changwook Yoon, 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

Challenges and solutions for core power distribution network designs

Dan Oh, Guang Chen, 2016, IEEE Electromagnetic Compatibility Magazine.

Statistical link analysis and in-situ characterization of high-speed memory bus in 3D package systems

Jihong Ren, Dan Oh, Ling Yang, 2011, 2011 IEEE International Symposium on Electromagnetic Compatibility.

Advanced Fan-Out Package SI/PI/Thermal Performance Analysis of Novel RDL Packages

Kilsoo Kim, Dan Oh, Jaechoon Kim, 2018, 2018 IEEE 68th Electronic Components and Technology Conference (ECTC).

System Level Modeling of Timing Margin Loss Due to Dynamic Supply Noise for High-Speed Clock Forwarding Interface

Dan Oh, Yujeong Shim, 2016, IEEE Transactions on Electromagnetic Compatibility.

System level modeling of supply noise induced jitter for high speed clock forwarding interfaces

Dan Oh, Yujeong Shim, 2016, IEEE Electromagnetic Compatibility Magazine.

In-depth analysis of power noise coupling between core and periphery power rails

Dan Oh, Guang Chen, Shishuang Sun, 2013, 2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems.

System-level modeling and simulation of periodic jitter in high-speed links

Dan Oh, Yu Chang, 2010, 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems.

Clock jitter modeling in statistical link simulation

Dan Oh, Sam Chang, 2009, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.

Statistical analysis of inter-symbol-interference and crosstalk for coding buses

Dan Oh, Yu Chang, R. Schmitt, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

A study of reduced-terminal models for system-level SSO noise analysis

Madhavan Swaminathan, Dan Oh, Joong-Ho Kim, 2010, 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems.

System Margin Improvement with Multiphase Equalization for High-Speed Links

Jihong Ren, Dan Oh, 2007, 2007 IEEE Electrical Performance of Electronic Packaging.

On overcoming the limitations of single-ended signaling for graphics memory interfaces

Aliazam Abbasfar, Amir Amirkhany, Dan Oh, 2011, IEEE Asian Solid-State Circuits Conference 2011.

Package Technologies for the 4th Industrial Revolution

Dan Oh, 2019 .

Jitter modeling in statistical link simulation

Dan Oh, Yu Chang, C. Madden, 2008, 2008 IEEE International Symposium on Electromagnetic Compatibility.

Fast ISI Characterization of Passive Channels Using Extreme Value Distribution

Dan Oh, Yu Chang, 2007, 2007 IEEE Electrical Performance of Electronic Packaging.

Power integrity analysis for core logic blocks

Dan Oh, Karthik Chandrasekar, Alex Razmadze, 2013, 2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems.

Optimization of High-Speed Package Design on Statistical Domain

Dae-Woo Kim, Ki Jin Han, Dan Oh, 2020, 2020 IEEE 70th Electronic Components and Technology Conference (ECTC).

In-depth study of simultaneous switching noise patterns for different signaling topologies

Hui Liu, Dan Oh, Kundan Chand, 2014, 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC).

Impact of PCB decoupling on device electromigration performance

Hui Liu, Dan Oh, Guang Chen, 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

Active crosstalk cancellation for next-generation single-ended memory interfaces

Dan Oh, John Wilson, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

System level signal and power integrity analysis for 3200Mbps DDR4 interface

Dan Oh, Janani Chandrasekhar, June Feng, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Accurate Characterization of Broadband Multiconductor Transmission Lines for High-Speed Digital Systems

Dan Oh, Joong-Ho Kim, Woopoung Kim, 2010, IEEE Transactions on Advanced Packaging.

Plane bounce in high-speed single-ended signaling I/O interfaces

Dan Oh, 2011, 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems.

Characterization and analysis of vertical coupling impact on receiver performance in high speed serial interface

Dan Oh, Janani Chandrasekhar, Yujeong Shim, 2013, 2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems.

Low Cost Si-Less RDL Interposer Package for High Performance Computing Applications

Dan Oh, Kyoung-Lim Suk, Dae-woo Kim, 2018, 2018 IEEE 68th Electronic Components and Technology Conference (ECTC).

Improved PCB via pattern to reduce crosstalk at package BGA region for high speed serial interface

Dan Oh, Yujeong Shim, 2014, 2014 IEEE 64th Electronic Components and Technology Conference (ECTC).