Songjun Pan

Mitigating Voltage Emergency in Simultaneous Multithreading Processor by Memory Level Parallelism Aware Thread Scheduling: Mitigating Voltage Emergency in Simultaneous Multithreading Processor by Memory Level Parallelism Aware Thread Scheduling

Yu Hu, Xiao-Wei Li, Xing Hu, 2014 .

A cost-effective substantial-impact-filter based method to tolerate voltage emergencies

Yu Hu, Xiaowei Li, Xing Hu, 2011, 2011 Design, Automation & Test in Europe.

IVF: Characterizing the vulnerability of microprocessor structures to intermittent faults

Yu Hu, Xiaowei Li, Songjun Pan, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Online Computing and Predicting Architectural Vulnerability Factor of Microprocessor Structures

Yu Hu, Xiaowei Li, Songjun Pan, 2009, 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing.