Dunshan Yu

发表

Fully on-chip clock jitter and skew measurement scheme via incoherent subsampling

Yinxuan Lyu, Jianhua Feng, Kai Zhu, 2020, Microelectron. J..

All-digital synchronous 2 × time-difference amplifier based on time register

Yinxuan Lyu, Jianhua Feng, Dunshan Yu, 2017 .

Research on circuit level countermeasures for Differential Power Analysis attacks

Rui Li, Xiaole Cui, Di Wu, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

A fast acquisition algorithm based on FFT for BOC modulated signals

Yanbin Zhang, Dunshan Yu, Weijun Lu, 2015, TENCON 2015 - 2015 IEEE Region 10 Conference.

A Low Cost Correlator Structure in the Pseudo-Noise Code Acquisition System

Ying Li, Xing Zhang, Dunshan Yu, 2009, IEICE Trans. Commun..

Evaluation of Dynamic-Adjusting Threshold-Voltage Scheme for Low-Power FinFET Circuits

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Capacitor mismatch auto-compensation for MEMS gyroscope differential capacitive sensing circuit

Dunshan Yu, Zhongjian Chen, Yacong Zhang, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.

A behavior-oriented simulation tool for design and optimization of sigma-delta ADCs

Dunshan Yu, Xin Zhang, Shimin Sheng, 2007, 2007 7th International Conference on ASIC.

Balance Differential Coherent Bit Synchronization Algorithm for GNSS Receiver

Yanbin Zhang, Dunshan Yu, Weijun Lu, 2015, IEICE Trans. Commun..

A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

An Efficient Acquisition Architecture for BOC-modulated Signal

Dunshan Yu, Weijun Lu, Dengyun Lei, 2015 .

A high-voltage interface circuit for MEMS vibratory gyroscope

Dunshan Yu, Zhongjian Chen, Yacong Zhang, 2012, 2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC).

Training Ternary Neural Networks By Rectified L2 Regularization

Dunshan Yu, Xiaoxin Cui, Yuanning Fan, 2019, 2019 IEEE 1st International Conference on Civil Aviation Safety and Information Technology (ICCASIT).

A CMOS Differential Difference Amplifier with Reduced Nonlinearity Error of Interpolation for Interpolating ADCs

Xin Zhang, Dunshan Yu, Shimin Sheng, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Carrier-Aided Smoothing for Real-Time Beidou Positioning

Dunshan Yu, Cui Xiaoxin, Dengyun Lei, 2013 .

High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m )

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2017, IEEE Transactions on Industrial Electronics.

Design and implementation of an optimized FIR filter for IF GPS signal simulator

Jie Huang, Dunshan Yu, Yingying Cui, 2010, 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

Improving tracking accuracy with subcarrier assistance and code monitoring for BOC modulated signal

Dunshan Yu, Weijun Lu, Yanbin Zhang, 2016, Comput. Electr. Eng..

Efficient method for random fault attack against AES hardware implementation

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2016, 2016 China Semiconductor Technology International Conference (CSTIC).

A Discrete STFT Processor for Real-time Spectrum Analysis

Dunshan Yu, Shimin Sheng, Shiqun Zhang, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

A capacitive Interface Circuit with capacitor mismatch Auto-compensation for MEMS gyroscope

Dunshan Yu, Yacong Zhang, Tingting Tao, 2013, J. Circuits Syst. Comput..

Efficient Weak Signals Acquisition Strategy for GNSS Receivers

Yanbin Zhang, Dunshan Yu, Weijun Lu, 2016, IEICE Trans. Commun..

Design and implementation of ΣΔ AD converter

Jie Huang, Dunshan Yu, Xiaoxin Cui, 2009, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

Multimodal Emotion Recognition Model using Physiological Signals pdf

Dunshan Yu, Jinlong Lin, Yuxuan Zhao, 2019, ArXiv.

Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2016, IEICE Trans. Electron..

A low-energy high-throughput asynchronous AES for secure smart cards

Xing Zhang, Dunshan Yu, Jian Cao, 2015, 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).

Ultralow-power high-speed flip-flop based on multimode FinFETs

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2015, Science China Information Sciences.

The implementation methods of high speed FIR filter on FPGA

Xing Zhang, Ying Li, Dunshan Yu, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

Delay Line Encoding For Low Power

Dunshan Yu, Shimin Sheng, Shiqun Zhang, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

A Dynamic-Adjusting Threshold-Voltage Scheme for FinFETs low power designs

Di Wu, Rui Li, Wei Wei, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A New Method for Futures Price Trends Forecasting Based on BPNN and Structuring Data

Dunshan Yu, Chao Geng, Weijun Lu, 2019, IEICE Trans. Inf. Syst..

Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs

Di Wu, Rui Li, Wei Wei, 2014, Science China Information Sciences.

A Novel Polymorphic Gate Based Circuit Fingerprinting Technique

Gang Qu, Xiaole Cui, Dunshan Yu, 2018, ACM Great Lakes Symposium on VLSI.

Research of weak signal acquisition algorithms for high sensitivity GPS receivers

Dunshan Yu, Weijun Lu, Lingjuan Wu, 2009, 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia).

A 108fsrms 0.45mW 100MS/s 1.25MHz bandwidth multi-bit ΔΣ time-to-digital converter with dynamic element matching

Yinxuan Lyu, Jianhua Feng, Dunshan Yu, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A practical cold boot attack on RSA private keys

Gang Qu, Xiaole Cui, Dunshan Yu, 2017, 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST).

A novel H.264 QP adaptive MPDC block-matching algorithm and its VLSI design

Dunshan Yu, Xiaoxin Cui, Shimin Sheng, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

A JTAG-based configuration circuit applied in SerDes chip

Dunshan Yu, Xiaoxin Cui, Xun Jiang, 2011, 2011 9th IEEE International Conference on ASIC.

Design and Implementation of a 2-level FSK Digital Modems Using CORDIC Algorithm

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Mixed optimization method in design of FC-2

Dunshan Yu, Xiaoxin Cui, Jie Jin, 2009, 2009 IEEE 8th International Conference on ASIC.

A compact implementation of masked AES S-box

Rui Li, Xiaole Cui, Di Wu, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

Effective PPS Signal Generation with Predictive Synchronous Loop for GPS

Yanbin Zhang, Dunshan Yu, Yongcan Huang, 2014, IEICE Trans. Commun..

A parallel intra prediction architecture for H.264 video decoding

Dunshan Yu, Xiaoxin Cui, Xi Wang, 2009, 2009 IEEE 8th International Conference on ASIC.

Design and implementation of a parallel real-time FFT processor

Dunshan Yu, Shiqun Zhang, 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

An Itra-high Speed Real-time T Processor

Dunshan Yu, Shimin Sheng, Shiqun hang, 2005, 2005 6th International Conference on ASIC.

A Memory-Efficient CAVLC Decoding Scheme for H.264/AVC

Xing Zhang, Dunshan Yu, Xixin Cao, 2008, 2008 10th International Conference on Advanced Communication Technology.

A 2-Level FSK Demodulator for Digital-IF Receiver

Xing Zhang, Dunshan Yu, Xiaoxin Cui, 2007, 2007 IEEE Conference on Electron Devices and Solid-State Circuits.

An adaptive edge enhancement algorithm and hardware implementation

Dunshan Yu, Xiaoxin Cui, Jinkai Long, 2010, 2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

Resource-efficient acquisition architecture for BOC-modulated signals

Dunshan Yu, Weijun Lu, Dengyun Lei, 2014, IEICE Electron. Express.

A VLSI structural optimization method and workflow based on synthesis frequency inflexion

Dunshan Yu, Xiaoxin Cui, Ying Li, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

Employing the mixed FBB/RBB in the design of FinFET logic gates

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A Pipelined Interpolating Analog-to-Digital Converter with Reduced Nonlinearity Error

Dunshan Yu, Xin Zhang, Shimin Sheng, 2007, 2007 2nd IEEE Conference on Industrial Electronics and Applications.

A CORDIC Demodulator Platform for Digital-IF Receiver

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

Design and implementation of a BPSK acoustic modem for underwater communication

Dunshan Yu, Xiaoxin Cui, Lingjuan Wu, 2012 .

Improving DFA attacks on AES with unknown and random faults

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2016, Science China Information Sciences.

A high effective algorithm of 32-bit multiply and MAC instructions' VLSI implementation with 32/spl times/8 multiplier-accumulator in DSP applications

Dunshan Yu, Ze Tian, Yu-lin Qiu, 2002, 6th International Conference on Signal Processing, 2002..

A Doppler bins elimination algorithm in a GPS signal acquisition system

Xing Zhang, Dunshan Yu, Weijun Lu, 2009, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

A control and readout circuit with capacitive mismatch auto-compensation for MEMS vibratory gyroscope

Dunshan Yu, Zhongjian Chen, Yacong Zhang, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

An Efficient VLSI Implementation of Distributed Architecture for DWT

Dunshan Yu, Qingchun Wang, Xixin Cao, 2006, 2006 IEEE Workshop on Multimedia Signal Processing.

Doppler-Aided Algorithm for BeiDou Position

Dunshan Yu, Dengyun Lei, Weijun Lu, 2013 .

Design and VLSI implementation of high performance NCO based on Galois fields

Dunshan Yu, Xiaoxin Cui, Jinkai Long, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Design of dual-gigabit transceiver for fibre channel FC-1 layer

Dunshan Yu, Guicai Sun, 2008, 2008 IEEE International Conference on Electron Devices and Solid-State Circuits.

High-speed constant-time division module for Elliptic Curve Cryptography based on GF(2m)

Xiao Zhang, Ying Huang, Dunshan Yu, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Design of a Reconfigurable Acoustic Modem for Underwater Sensor Networks

Bo Gu, Ryan Kastner, Dunshan Yu, 2013, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A 0.32uW physically unclonable fuction with BER <1.18E-5 using current starved inverters

Yinxuan Lyu, Jianhua Feng, Dunshan Yu, 2016, 2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).

A Low-noise High-voltage Interface Circuit for capacitive MEMS gyroscope

Dunshan Yu, Zhongjian Chen, Yacong Zhang, 2013, J. Circuits Syst. Comput..

A low-noise interface circuit for MEMS vibratory gyroscope

Dunshan Yu, Zhongjian Chen, Wengao Lu, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Improved Discrete Wavelet Analysis and Principal Component Analysis for EEG Signal Processing

Dunshan Yu, Xiaoxin Cui, Kanglin Xiao, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Design and Implementation of Digital Up Converter for Homenet

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2005, 2005 IEEE Conference on Electron Devices and Solid-State Circuits.

FPGA Implementation of Quantized Convolutional Neural Networks

Qi Zhang, Ying Zhang, Dunshan Yu, 2019, 2019 IEEE 19th International Conference on Communication Technology (ICCT).

A Narrow-Band Interference Suppression Method in OFDM System

Yang Liu, Dunshan Yu, Xiaoxin Cui, 2012 .

A high-efficient fault attack on AES S-box

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2016, 2016 Sixth International Conference on Information Science and Technology (ICIST).

Design of Low-Power High-Performance FinFET Standard Cells

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2018, Circuits Syst. Signal Process..

Bit synchronization methods and their performance for HSGPS receivers

Xing Zhang, Dunshan Yu, Weijun Lu, 2009, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

A2-Level FSKDemodulator forDigital-IF Receiver

Dunshan Yu, Xiaoxin Cui, 2007 .

Design andImplementation ofa2-level FSK Digital ModemsUsingCORDICAlgorithm

Dunshan Yu, Xiaoxin Cui, Shimin Sheng, 2006 .

A Novel Parallel VLSI Architecture for H.264/AVC Scalar Quantization

Dunshan Yu, Xi-Xin Cao, Shimin Sheng, 2008 .

An Itra-high SpeedReal-timeTProcessor

Dunshan Yu, Shimin Sheng, 2005 .

VLSI design of HW/SW interface logic in FC-2

Jie Jin, Dunshan Yu, Xiaoxin Cui, 2010, The 2010 International Conference on Green Circuits and Systems.

A high performance baseband transceiver IC for HiNOC communication systems

Bin Sun, Dunshan Yu, Xiaoxin Cui, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Polymorphic gate based IC watermarking techniques

Gang Qu, Xiaole Cui, Dunshan Yu, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

Binary Convolutional Neural Network for Brain Computer Interfaces

Dunshan Yu, Xiaoxin Cui, Yuanning Fan, 2019, 2019 China Semiconductor Technology International Conference (CSTIC).

Design technique of Viterbi decoder in satellite communication

Xing Zhang, Dunshan Yu, Weijun Lu, 2007 .

An improved narrow-band interference suppression method for HINOC system

Dunshan Yu, Xiaoxin Cui, Wei Wei, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

Digital OFDM transmitter architecture and FPGA design

Dunshan Yu, Xiaoxin Cui, 2009, 2009 IEEE 8th International Conference on ASIC.

A power-efficient prediction hardware architecture for H.264 decoding

Dunshan Yu, Xiaoxin Cui, Xi Wang, 2010, 2010 5th IEEE Conference on Industrial Electronics and Applications.

Energy Frequency Discriminator for GNSS Carrier Tracking

Dunshan Yu, Weijun Lu, Yanbin Zhang, 2015 .

A low-noise high-linearity interface ASIC for MEMS gyroscopes

Dunshan Yu, Yacong Zhang, Tingting Tao, 2013 .

Signal acquisition and tracking for software GPS receivers

Dunshan Yu, Yingying Cui, Lingjuan Wu, 2009, 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia).

Insight to Double Estimator Technique: The concept of subcarrier aided code tracking

Hua Chen, Yanbin Zhang, Dunshan Yu, 2015, 2015 International Conference on Communications and Signal Processing (ICCSP).

Designing a 3D Graphics Processor for Mobile Applications

Dunshan Yu, Lingjuan Wu, Wenqian Zhao, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

A Full Swing And Low Power Voltage-Controlled Ring Oscillator

Dunshan Yu, Shimin Sheng, Xin wu, 2005, 2005 IEEE Conference on Electron Devices and Solid-State Circuits.

Application-Dependent Interconnect Testing of Xilinx FPGAs Based on Line Branches Partitioning

Jianhua Feng, Dunshan Yu, Teng Lin, 2009, IEICE Trans. Inf. Syst..

Session 6E:Multimedia andInternet Systems andServices (II)

Munchurl Kim, Dunshan Yu, Xixin Cao, 2008 .

An optimized design for a decimation filter and implementation for Sigma-Delta ADC

Jie Huang, Dunshan Yu, Xiaoxin Cui, 2009, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

A Homeostasis based Enhanced Training Method in Spiking Neural Networks for Pattern Recognition

Yuan Wang, Dunshan Yu, Xiaoxin Cui, 2021, 2021 China Semiconductor Technology International Conference (CSTIC).

A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS

Ru Huang, Yuan Wang, Dunshan Yu, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations

Ru Huang, Yuan Wang, Dunshan Yu, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Reliability evaluation of high-performance, low-power FinFET standard cells based on mixed RBB/FBB technique

Xiaole Cui, Dunshan Yu, Xiaoxin Cui, 2017 .

A Memory-Efficient CAVLC Decoding Scheme for

Dunshan Yu, Xixin Cao, Chungan Peng, 2008 .