Jon Alfredsson

Influence of Refresh Circuits Connected to Low Power Digital Quasi-Floating Gate Designs

Bengt Oelmann, Jon Alfredsson, 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

Design of a Parallel A/D-converter System on PCB - For High-Speed Sampling and Timing Error Correction : Examensarbete - Linköpings universitet

Jon Alfredsson, 2002 .

Capacitance selection for digital floating-gate circuits operating in subthreshold

Bengt Oelmann, Jon Alfredsson, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Small Fan-in Floating-Gate Circuits with Application to an Improved Adder Structure

Snorre Aunet, Bengt Oelmann, Jon Alfredsson, 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).

Basic Speed and Power Properties of Digital Floating-gate Circuits Operating in Subthreshold

Snorre Aunet, Bengt Oelmann, Jon Alfredsson, 2005 .

Limitations of subthreshold digital floating-gate circuits in present and future nanoscale CMOS technologies

Jon Alfredsson, 2008 .

Performance of CMOS and Floating-Gate Full-Adders Circuits at Subthreshold Power Supply

Snorre Aunet, Jon Alfredsson, 2007, PATMOS.

Pseudo floating-gate design limitations in Nano-CMOS with low power supply

Snorre Aunet, Jon Alfredsson, 2008 .

Trade-offs for high yield in 90 nm subthreshold floating-gate circuits by Monte Carlo simulations

Snorre Aunet, Jon Alfredsson, 2008 .

Trading Speed and Power for Reduced Substrate Noise from Digital CMOS Circuits

Bengt Oelmann, Jon Alfredsson, 2004 .

Performance of Digital Floating-Gate Circuits Operating at Subthreshold Power Supply Voltages

Jon Alfredsson, 2007 .