Rajkumar Sarma

发表

A novel low power hybrid flipflop using sleepy stack inverter pair

Helga Evangelene, Rajkumar Sarma, R. Sarma, 2014, 2014 Science and Information Conference.

Programmable Charge Pump

Rajkumar Sarma, 2019 .

Quantum Gate Implementation of a Novel Reversible Half Adder and Subtractor Circuit

Rajkumar Sarma, Ritika Jain, 2018, 2018 International Conference on Intelligent Circuits and Systems (ICICS).

Design and Performance Analysis of hybrid adders for high speed arithmetic circuit pdf

Rajkumar Sarma, Veerati Raju, 2012, VLSIC 2012.

PVT Variability Check on UCM Architectures at Extreme Temperature-Process Changes

Rajkumar Sarma, Cherry Bhargava, Shruti Jain, 2019 .

UCM: A Novel Approach for Delay Optimization

Shruti Jain, Rajkumar Sarma, Cherry Bhargava, 2019, International Journal of Performability Engineering.

Comparative analysis of carry select adder using 8T and 10T full adder cells

Rajkumar Sarma, Afshan Amin Khan, Shivendra Pandey, 2014, 2014 International Conference on Communication and Signal Processing.

QCA based sequential and combinational circuit design and importance of parasitic components

Rajkumar Sarma, Huzefa Saifee, Aviral Mehrotra, 2014, 2014 International Conference on Signal Propagation and Computer Technology (ICSPCT 2014).

DESIGN AND PERFORMANCE COMPARISON ANALYSIS OF HYBRID ADDERS

Rajkumar Sarma, Jyotirmoy Pathak, 2012 .

Design and Analysis of a Novel 8X8 Bit Signed/Unsigned Synchronous MAC Architecture Using Clock Gating Scheme for Fixed-Point Arithmetic

Rajkumar Sarma, Shruti Jain, Sandeep Dhariwal, 2018, 2018 International Conference on Intelligent Circuits and Systems (ICICS).

A novel low power and high speed Multiply-accumulate (MAC) unit design for floating-point numbers

Rajkumar Sarma, N. Jithendra Babu, 2015, 2015 International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM).

PIPELINED AND CLOCK GATED MAC ARCHITECTURE DESIGN AND IMPLEMENTATION

Rajkumar Sarma, Amarveer Kaur Dhindsa, 2016 .

High Speed Dual Mode Logic

Rajkumar Sarma, 2019 .

Performance analysis of CSA using BEC and FZF logic with optimized full adder cell

Rajkumar Sarma, Jyotirmoy Pathak, Shivendra Pandey, 2014, International Conference on Computing and Communication Technologies.

Application of ameliorated Harris Hawks optimizer for designing of low-power signed floating-point MAC architecture

Vikram Kumar Kamboj, Shruti Jain, Rajkumar Sarma, 2021, Neural Comput. Appl..