Krishnan Srinivasan

发表

Design of Network-on-Chip Architectures With a Genetic Algorithm-Based Technique

Glenn Leary, Krishnan Srinivasan, Krishna Mehta, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Low Complexity Heuristic for Design of Custom Network-on-Chip Architectures

Krishnan Srinivasan, Karam S. Chatha, 2006, Proceedings of the Design Automation & Test in Europe Conference.

SAGA: synthesis technique for guaranteed throughput NoC architectures

Krishnan Srinivasan, Karam S. Chatha, 2005, ASP-DAC.

Transmission de manière fiable de messages d'application en file d'attente

Krishnan Srinivasan, Craig A. Critchley, David O. Driver, 2005 .

Layout aware design of mesh based NoC architectures

Krishnan Srinivasan, Karam S. Chatha, 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).

A methodology for layout aware design and optimization of custom network-on-chip architectures

Krishnan Srinivasan, Karam S. Chatha, K. Srinivasan, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

Integer linear programming and heuristic techniques for system-level low power scheduling on multiprocessor architectures under throughput constraints

Krishnan Srinivasan, Karam S. Chatha, K. Srinivasan, 2007, Integr..

Linear-programming-based techniques for synthesis of network-on-chip architectures

Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod, 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

ISIS: a genetic algorithm based technique for custom on-chip interconnection network synthesis

Krishnan Srinivasan, Karam S. Chatha, 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

Computer aided design techniques for network-on-chip architectures and system-level low power optimization

Krishnan Srinivasan, Karamuir S. Chatha, 2006 .

Secure transmission from lying in a queue application messages

Krishnan Srinivasan, Craig A. Critchley, David O. Driver, 2005 .

Sampling-based garbage collection metadata management scheme for flash-based storage

David Hung-Chang Du, Krishnan Srinivasan, David J. Lilja, 2011, 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies (MSST).

An automated technique for topology and route generation of application specific on-chip interconnection networks

Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Exploring single-cell data with deep multitasking neural networks

Kevin R. Moon, Xiaomei Wang, Krishnan Srinivasan, 2017, Nature Methods.

System-level design techniques for throughput and power optimization of multiprocessor SoC architectures

Krishnan Srinivasan, Karam S. Chatha, Nagender Telkar, 2004, IEEE Computer Society Annual Symposium on VLSI.

Graph-based Neural Multi-Document Summarization pdf

Rui Zhang, Dragomir R. Radev, Krishnan Srinivasan, 2017, CoNLL.

Automated Techniques for Synthesis of Application-Specific Network-on-Chip Architectures

Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

An ILP formulation for system level throughput and power optimization in multiprocessor SoC architectures

Krishnan Srinivasan, Karam S. Chatha, K. Srinivasan, 2004, 17th International Conference on VLSI Design. Proceedings..

ILP and heuristic techniques for system-level design on network processor architectures

Krishnan Srinivasan, Karam S. Chatha, Christopher Ostler, 2007, TODE.

System-Level Design of Network-on-Chip Architectures ∗

Krishnan Srinivasan, Karam S. Chatha, K. Srinivasan, 2007 .

Application Specific Network-on-Chip Design with Guaranteed Quality Approximation Algorithms

Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod, 2007, 2007 Asia and South Pacific Design Automation Conference.

Learning Modes of Within-Hand Manipulation

Aaron M. Dollar, Krishnan Srinivasan, Berk Çalli, 2018, 2018 IEEE International Conference on Robotics and Automation (ICRA).

A technique for energy versus quality of service trade-off for MPEG-2 decoder

Krishnan Srinivasan, Karam S. Chatha, Vijay Ramamurthi, 2004, IEEE Computer Society Annual Symposium on VLSI.

A technique for low energy mapping and routing in network-on-chip architectures

Krishnan Srinivasan, Karam S. Chatha, K. Srinivasan, 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

Linear programming based techniques for synthesis of network-on-chip architectures

Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod, 2006, IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings..