Francesco Pappalardo

发表

Analysis and Implementation of a Novel Leading Zero Anticipation Algorithm for Floating-Point Arithmetic Units

Mauro Olivieri, Francesco Pappalardo, Simone Smorfa, 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

An application-oriented analysis of power/precision trade-off in fixed and floating-point arithmetic units for VLSI processors

Francesco Pappalardo, Giuseppe Visalli, Mirko Scarana, 2004, Circuits, Signals, and Systems.

A 10 pJ/cycle ultra-low-voltage 32-bit microprocessor system-on-chip

Nathan Ickes, Anantha Chandrakasan, Francesco Pappalardo, 2011, 2011 Proceedings of the ESSCIRC (ESSCIRC).

A Low-voltage, Fault-tolerant m icroprocessor

Nathan Ickes, Anantha P. Chandrakasan, Francesco Pappalardo, 2009 .

Modelling Vaccine Protocols

Francesco Pappalardo, Santo Motta, Pier Luigi Lollini, 2008 .

Statistical Analysis, for Reducing the Energy Dissipation in a Bus-switch Encoder

Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli, 2005, Circuits, Signals, and Systems.

Evaluation on power reduction applying gated clock approaches

Gaetano Palumbo, Francesco Pappalardo, S. Sannella, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Fuzzy processor and method of conducting fuzzy logic processing

Francesco Pappalardo, Vincenzo Catania, Biagio Giacalone, 1996 .

Method and apparatus for synchronization and identification of the Kodengruppe in CDMA cellular communication systems

Francesco Pappalardo, Agostino Galluzzo, Giuseppe Avellone, 2002 .

Method and apparatus for synchronization and Kodegruppenidentifizierung in a cellular communication system, and computer program for

Francesco Pappalardo, Giuseppe Visalli, Agostino Galluzzo, 2003 .

Fractional-order simulation tool for the brainstem vestibulo-ocular reflex (VOR)

Francesco Pappalardo, Riccardo Caponetto, Giovanni Dongola, 2012, Signal Image Video Process..

Method and apparatus for transmitting a digital signal via a computer bus and computer program product for

Francesco Pappalardo, Giuseppe Notarangelo, 2002 .

Encoding circuits for low power optical on-chip communications

Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Auto-Tuning and Fractional Order Controller Implementation on Hardware in the Loop System

Francesco Pappalardo, Riccardo Caponetto, Giovanni Dongola, 2013, J. Optim. Theory Appl..

Transmission method for an optical bus line

Francesco Pappalardo, Giuseppe Visalli, Giuseppe Notarangelo, 2003 .

Design issues for bus switch systems in deep sub-micro metric CMOS technologies

Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli, 2005, Circuits, Signals, and Systems.

Bus-switch coding for reducing power dissipation in off-chip buses

Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli, 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Low power strategy for a TFT controller

Gaetano Palumbo, Francesco Pappalardo, Giuseppe Notarangelo, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

The Dynamic-to-Static Conversion of Dynamic Fault Trees Using Stochastic Dependency Graphs and Stochastic Activity Networks

Francesco Pappalardo, Ferdinando Chiacchio, Gabriele Manno, 2013 .

A Low Power, Scalable and Runtime Customizable Microprocessor Architecture for Image Processing

Francesco Pappalardo, Elio Guidetti, Elena Salurso, 2007, J. Low Power Electron..