Ping-Wei Wang

A HKMG 28nm 1GHz fully-pipelined tile-able 1MB embedded SRAM IP with 1.39mm2 per MB

Sang H. Dhong, Osamu Takahashi, Min-Jer Wang, 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference.

A 20nm 112Mb SRAM in High-к metal-gate with assist circuitry for low-leakage and low-VMIN applications

Min Cao, Sreedhar Natarajan, Hank Cheng, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

45nm Node Planar-SO1 Technology with 0.296pm2 6T-SUM Cell

Chenming Hu, Mong-Song Liang, Di-Hong Lee, 2004 .

45nm node planar-SOI technology with 0.296 /spl mu/m/sup 2/ 6T-SRAM cell

Chenming Hu, Tsai-Sheng Gau, Jaw-Jung Shin, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..