Changhong Yu

A clock-fault tolerant architecture and circuit for reliable nanoelectronics system

Jie Chen, An-Yeu Wu, Jilin Liu, 2007, 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era.

An On-Chip Clock Jitter Fault Detection Circuit for System-on-Chip Application

Changhong Yu, 2011 .

A Novel Clock-Fault Detection and Self-Recovery Circuit for Reliable Nanoelectronics System

Changhong Yu, 2009, 2009 International Workshop on Intelligent Systems and Applications.

A 0.13μm hardware-efficient probabilistic-based noise-tolerant circuit design and implementation with 24.5dB noise-immunity improvement

Jie Chen, I-Chyn Wey, Changhong Yu, 2007, 2007 IEEE Asian Solid-State Circuits Conference.

Design of On-Line Clock Jitter Fault Detection Circuit for Time-Error-Tolerant System

Changhong Yu, Changhong Yu, 2011 .

A 0.18=μm Probabilistic-Based Noise-Tolerate Circuit Design and Implementation with 28.7dB Noise-Immunity Improvement

An-Yeu Wu, Jie Chen, I-Chyn Wey, 2006, 2006 IEEE Asian Solid-State Circuits Conference.

A Clock Fault Detection Circuit for Reliable High Speed System by Time-to-Voltage Conversion

Changhong Yu, 2009, 2009 Second International Symposium on Electronic Commerce and Security.