Shen-Li Chen

发表

Layout-type dependence on ESD/LU reliabilities for LVTnSCR devices

Shen-Li Chen, Chun-Ju Lin, Min-Hua Lee, 2013, 2013 1st International Future Energy Electronics Conference (IFEEC).

Influences of drain side P+ discrete-islands on ESD robustness in the 60-V pLDMOS-SCR ("PNPNP" arranged-type)

Shen-Li Chen, Yu-Ting Huang, Shawn Chang, 2015, 2015 International Symposium on Next-Generation Electronics (ISNE).

Design on ESD robustness of source-side discrete distribution in the 60-V high-voltage nLDMOS devices

Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, 2016, 2016 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

Influences of source pick-up and well engineering on the ESD robustness of LV process nMOSTs

Shen-Li Chen, Chun-Ju Lin, Min-Hua Lee, 2013, 2013 1st International Future Energy Electronics Conference (IFEEC).

Impacts of the Drain-side nWell Adding on ESD Robustness in 0.25-μm LV/HV nMOSTs

Shen-Li Chen, Min-Hua Lee, 2014 .

ESD reliability influence of a 60 V power LDMOS by the FOD-based (& Dotted-OD) drain

Shen-Li Chen, Min-Hua Lee, 2014, 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE ASIA).

Source-end design and failure study for ESD enhancement of 60 V nLDMOS devices

Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, 2017, 2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

Design and Implementation of Curve Compensated Bandgap Voltage Reference 1.15V Using 180nm Technology

Shen-Li Chen, Hung-Wei Chen, Ya-Ran Xue, 2012 .

ESD reliability building in 0.25 μm 60-V p-channel LDMOS DUTs with different embedded SCRs

Shen-Li Chen, Yu-Ting Huang, Shawn Chang, 2015, 2015 IEEE International Conference on Consumer Electronics - Taiwan.

Reliability Influences of Substrate Pick-up and Well Engineering of LV Nmosts in Communication Modules

Shen-Li Chen, Min-Hua Lee, 2013 .

Drain Side nWell influences on the reliability immunity of 0.25-μm LV/HV GGnMOS devices by TLP testing and EDA simulation

Shen-Li Chen, Min-Hua Lee, 2014, SIMULTECH 2014.

An investigation of single- and multi-finger nMOSFETs for the output pin ESD protection in integrated circuits

Shen-Li Chen, Guan-Jhong Chen, B.-L. Wu, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

A Comprehensive Evaluation of Drain-side Layout Topologies on the Power nLDMOS ESD/LU Reliabilities

Shen-Li Chen, Min-Hua Lee, 2014 .

The pick-up strategy of multi-finger GDpMOSTs on ESD Robustness in a 0.35 μm process technology

Shen-Li Chen, Min-Hua Lee, 2014 .

Layout strategy of P+ pick-up on the LV nMOST ESD reliability for 0.6μm to 0.18μm CMOS technologies

Shen-Li Chen, Min-Hua Lee, 2013, 2013 International Symposium on Next-Generation Electronics.

To achieve a novel weak snapback characteristic in the high voltage nLDMOS

Shen-Li Chen, Hung-Wei Chen, Po-Ying Chen, 2010, 2010 International Symposium on Next Generation Electronics.

Dynamic scanning method to clarify the mechanism of WLCSP package reliability issue

Shen-Li Chen, Chwei-Shyong Tsai, Po-Ying Chen, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

ESD reliability improvement by the source-discrete placement in a 45-V pLDMOS-SCR (npn-type)

Shen-Li Chen, Yu-Ting Huang, Chih-Hung Yang, 2016, 2016 IEEE International Conference on Power and Energy (PECon).

Strengthen Anti-ESD Characteristics in an HV LDMOS With Superjunction Structures

Shen-Li Chen, Yi-Sheng Lai, 2015, IEEE Transactions on Power Electronics.

Design of High-ESD Reliability in HV Power pLDMOS Transistors by the Drain-Side Isolated SCRs

Shen-Li Chen, Yu-Ting Huang, Yi-Cih Wu, 2017, IEICE Trans. Electron..

Optimized latch-up design of a high voltage nLDMOSFET

Shen-Li Chen, Hung-Wei Chen, Po-Ying Chen, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Reliability Analysis of P+ Pickup on Anti-ESD Performance in Four CMOS Low-Voltage Technology Nodes

Shen-Li Chen, Min-Hua Lee, 2016 .

ESD reliability comparison of different layout topologies in the 0.25-μm 60-V nLDMOS power devices

Shen-Li Chen, Chun-Ju Lin, Yu-Ting Huang, 2015, 2015 International Symposium on Next-Generation Electronics (ISNE).

ESD-improvement comparisons of HV n-/p-LDMOS components by the bulk modulations

Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, 2017, 2017 IEEE 3rd International Future Energy Electronics Conference and ECCE Asia (IFEEC 2017 - ECCE Asia).

Pseudo-Failure Impacts on ESD Robustness in Integrated Circuits I/O Ports by the Parasitic Capacitance

Shen-Li Chen, Hung-Wei Chen, 2014 .

Novel parasitic-SCR impacts on ESD robustness in the 60 V power pLDMOS devices

Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, 2017, 2017 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW).

Design of Reliability Improvement in HV p-Channel LDMOS DUTs by a 0.25μm 60-V BCD Process

Shen-Li Chen, Yu-Ting Huang, 2016 .

ESD-reliability influence on LV/HV MOSFET devices by different zapping-voltage steps in the transmission-line pulse testing

Shen-Li Chen, Min-Hua Lee, Yu-Jen Chen, 2017, 2017 International Conference on Applied System Innovation (ICASI).

Elucidating the Effects of Current Stress History on Reliability Characteristics by Dynamic Analysis

Shen-Li Chen, Po-Ying Chen, Wen-Kuan Yeh, 2008 .

ESD protection design and enhancement in the power 60-V n-channel LDMOS by embedded-SCR anode islands

Shen-Li Chen, Kuei-Jyun Chen, Hung-Wei Chen, 2016 .

By using grey system and Neural-Fuzzy Network methods to obtain the threshold voltage of submicron n-MOSFET DUTs

Shen-Li Chen, Dun-Ying Shu, 2015, 2015 12th International Conference on Fuzzy Systems and Knowledge Discovery (FSKD).

Drain-side discrete-distributed layout influences on reliability issues in the 0.25 μm 60-V power pLDMOS

Shen-Li Chen, Yu-Ting Huang, 2015, 2015 9th International Conference on Power Electronics and ECCE Asia (ICPE-ECCE Asia).

Design and Impact on ESD/LU Immunities by Drain-Side Super-Junction Structures in Low-(High-)Voltage MOSFETs for the Power Applications

Shen-Li Chen, Yu-Ting Huang, Shawn Chang, 2018, IEICE Trans. Electron..

Reliability Design of Source/Drain Adaptive Layers in an HV Power nLDMOS

Shen-Li Chen, Wen-Ming Lee, 2013 .

ESD protection design for the 45-V pLDMOS-SCR (p-n-p-arranged) devices with source-discrete distributions

Shen-Li Chen, Yu-Ting Huang, Chih-Hung Yang, 2016, 2016 IEEE 5th Global Conference on Consumer Electronics.

ESD reliability evaluations of the 60-V nLDMOS by the drain-side discrete SCRs

Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, 2016, 2016 5th International Symposium on Next-Generation Electronics (ISNE).

TLP Characterization and Leakage-Biasing-Voltage (VLB) Correlations in MOSFET Measurements

Shen-Li Chen, Min-Hua Lee, 2014, 2014 International Symposium on Computer, Consumer and Control.

ESD-immunity evaluations of a 40 V nLDMOS with embedded SCRs in the drain side

Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, 2017, 2017 6th International Symposium on Next Generation Electronics (ISNE).

Design of delay-locked loop for wide frequency locking range

Shen-Li Chen, Hsun-Hsiang Chen, Zih-Hsiang Wong, 2013, 2013 International SoC Design Conference (ISOCC).

Parasitic-Capacitance Influence of ESD Immunity Level in Integrated Circuits I/O Ports

Shen-Li Chen, Hung-Wei Chen, Chun-Hsing Shih, 2013 .

Enhanced Electrostatic Discharge Reliability in GaN-Based Light-Emitting Diodes by the Electrode Engineering

Shen-Li Chen, 2014, Journal of Display Technology.

The I-V Characteristic Prediction of BCD LV pMOSFET Devices Based on an ANFIS-Based Methodology

Shen-Li Chen, 2015, Adv. Fuzzy Syst..

Influences of Substrate Pickup Integrated with the Source-End Engineering on ESD/Latch-Up Reliabilities in a 0.35-um 3.3-V Process

Shen-Li Chen, Min-Hua Lee, Tzung-Shian Wu, 2016, 2016 International Symposium on Computer, Consumer and Control (IS3C).

ESD Reliability Improvement of an HV nLDMOS by the Bulk FODs Engineering

Shen-Li Chen, Min-Hua Lee, 2014 .

Sensing and Reliability Improvement of Electrostatic-Discharge Transient by Discrete Engineering for High-Voltage 60-V n-Channel Lateral-Diffused MOSFETs with Embedded Silicon-Controlled Rectifiers

Shen-Li Chen, Yi-Cih Wu, 2018, Sensors.

Reliability Influences of LV nMOSFETs by the Drain-Contact Variations

Shen-Li Chen, Min-Hua Lee, 2013 .

ESD reliability improvement of the 0.25-µm 60-V power nLDMOS with discrete embedded SCRs separated by STI structures

Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, 2016, 2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia).

Impacts on the anti-ESD/ anti-LU immunities by the drain-side superjunction structure of HV/ LV nMOSFETs

Shen-Li Chen, Yu-Ting Huang, Shawn Chang, 2015, 2015 IEEE 2nd International Future Energy Electronics Conference (IFEEC).

New methodology to predict energy bandgaps in GaxIn1-xAsyP1-ycompounds by ANFIS theories

Shen-Li Chen, Der Ann Fann, 2000, SPIE Photonics Taiwan.

Source-End Layouts on ESD/LU Reliabilities in an HV 0.25 um 60 V nLDMOS

Shen-Li Chen, Chun-Ju Lin, Tzung Shian Wu, 2013 .

Measurement forecast of anomalous threshold voltages in BCD LV submicron n-MOSFETs with two artificial intelligence methods

Shen-Li Chen, Dun-Ying Shu, 2017 .

Implementation of a single-chip design for the three-phase brushless-DC-motor (BDCM) system

Shen-Li Chen, C. K. Lee, Hsun-Hsiang Chen, 2013, 2013 International SoC Design Conference (ISOCC).

Holding-voltage Improvement of UHV Circular nLDMOS Transistors by the Drain-side SCR Engineering

Shen-Li Chen, Tien-Yu Lan, Yu-Jie Zhou, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

ESD-Immunity Impact of HV pLDMOS with Drain-side Embedded Horizontal P-type Schottky Modulations

Shen-Li Chen, Tien-Yu Lan, Yu-Jie Zhou, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).