Shivam Bhasin

发表

What Lies Ahead: Extending TVLA Testing Methodology Towards Success Rate

Debdeep Mukhopadhyay, Sylvain Guilley, Debapriya Basu Roy, 2016, IACR Cryptol. ePrint Arch..

Time-Frequency Analysis for Second-Order Attacks

Sylvain Guilley, Jean-Luc Danger, Olivier Rioul, 2013, CARDIS.

Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage

Jean-Luc Danger, Yu-ichi Hayashi, Julien Bringer, 2014, IEICE Trans. Electron..

Embedded systems security: An evaluation methodology against Side Channel Attacks

Sylvain Guilley, Jean-Luc Danger, Youssef Souissi, 2011, Proceedings of the 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP).

Countering early evaluation: an approach towards robust dual-rail precharge logic

Sylvain Guilley, Florent Flament, Jean-Luc Danger, 2010, WESS '10.

On Comparing Side-channel Properties of AES and ChaCha20 on Microcontrollers

Shivam Bhasin, Zakaria Najm, Stjepan Picek, 2018, 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

A low-entropy first-degree secure provable masking scheme for resource-constrained devices

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2013, WESS '13.

Testing of Side-Channel Leakage of Cryptographic Intellectual Properties: Metrics and Evaluations

Debdeep Mukhopadhyay, Debapriya Basu Roy, Sikhar Patranabis, 2017 .

Exploiting FPGA block memories for protected cryptographic implementations

Sylvain Guilley, Jean-Luc Danger, Wei He, 2013, 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Automated Evaluation of Software Encoding Schemes

Shivam Bhasin, Dirmanto Jap, Jakub Breier, 2019 .

Bypassing Parity Protected Cryptography using Laser Fault Injection in Cyber-Physical System

Wei He, Anupam Chattopadhyay, Shivam Bhasin, 2016, CPSS@AsiaCCS.

Low-cost design of stealthy hardware trojan for bit-level fault attacks on block ciphers

Wei He, Xinjie Zhao, Shize Guo, 2016, Science China Information Sciences.

Logic-Level Countermeasures to Secure FPGA based Designs. (Contremesures au niveau logique pour sécuriser les architectures de crypto-processeurs dans un FPGA)

Shivam Bhasin, Shivam Bhasin, 2011 .

Side-Channel Attack on STTRAM Based Cache for Cryptographic Application

Swaroop Ghosh, Anupam Chattopadhyay, Shivam Bhasin, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

Opening pandora's box: Implication of RLUT on secure FPGA applications and IP security

Debdeep Mukhopadhyay, Debapriya Basu Roy, Shivam Bhasin, 2017, 2017 IEEE 2nd International Verification and Security Workshop (IVSW).

Automatic Characterization of Exploitable Faults: A Machine Learning Approach

Debdeep Mukhopadhyay, Pallab Dasgupta, Sayandeep Saha, 2019, IEEE Transactions on Information Forensics and Security.

From cryptography to hardware: analyzing and protecting embedded Xilinx BRAM for cryptographic applications

Sylvain Guilley, Jean-Luc Danger, Annelie Heuser, 2013, Journal of Cryptographic Engineering.

Hardware Trojan detection by delay and electromagnetic measurements

Sylvain Guilley, Jean-Luc Danger, Bruno Robisson, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

SCADFA: Combined SCA+DFA Attacks on Block Ciphers with Practical Validations

Debdeep Mukhopadhyay, Sikhar Patranabis, Nilanjan Datta, 2019, IEEE Transactions on Computers.

NICV: Normalized inter-class variance for detection of side-channel leakage

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2014, 2014 International Symposium on Electromagnetic Compatibility, Tokyo.

A survey on hardware trojan detection techniques

Shivam Bhasin, Francesco Regazzoni, F. Regazzoni, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Transistor level SCA-resistant scheme based on fluctuating power logic

Wei He, Xinjie Zhao, Shize Guo, 2016, Science China Information Sciences.

DRECON: DPA Resistant Encryption by Construction

Chester Rebeiro, Debdeep Mukhopadhyay, Sylvain Guilley, 2014, AFRICACRYPT.

Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology

Makoto Nagata, Jean-Luc Danger, Shivam Bhasin, 2013, ES4CPS '14.

Reactive Design Strategies Against Fault Injection Attacks

Shivam Bhasin, Jakub Breier, Wei He, 2018 .

A look into SIMON from a side-channel perspective

Jean-Luc Danger, Shivam Bhasin, Zakaria Najm, 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

Analysis and Improvements of the DPA Contest v4 Implementation

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2014, SPACE.

Countering early propagation and routing imbalance of DPL designs in a tree-based FPGA

Jean-Luc Danger, Shivam Bhasin, Emna Amouri, 2015, 2015 International Conference on IC Design & Technology (ICICDT).

Online Detection and Reactive Countermeasure for Leakage from BPU Using TVLA

Debdeep Mukhopadhyay, Sarani Bhattacharya, Shivam Bhasin, 2018, 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID).

From Cryptography to Hardware: Analyzing Embedded Xilinx BRAM for Cryptographic Applications

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2012, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture Workshops.

Number "Not Used" Once - Practical Fault Attack on pqm4 Implementations of NIST Candidates

Debdeep Mukhopadhyay, Debapriya Basu Roy, Anupam Chattopadhyay, 2019, COSADE.

Overview of Dual rail with Precharge logic styles to thwart implementation-level attacks on hardware cryptoprocessors

Sylvain Guilley, Jean-Luc Danger, Maxime Nassar, 2009, 2009 3rd International Conference on Signals, Circuits and Systems (SCS).

Exploiting FPGA block memories for protected cryptographic implementations

Sylvain Guilley, Jean-Luc Danger, Wei He, 2013, ReCoSoC.

Improved low-entropy masking scheme for LED with mitigation against correlation-enhanced collision attacks

Xinjie Zhao, Shize Guo, Shivam Bhasin, 2017, 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST).

Theory of masking with codewords in hardware: low-weight dth-order correlation-immune Boolean functions

Claude Carlet, Sylvain Guilley, Shivam Bhasin, 2013, IACR Cryptol. ePrint Arch..

Design of Secure and Side-Channel Resistant Cryptographic Processors

Giorgio Di Natale, Ricardo Chaves, Nele Mentens, 2015, ISCAS 2015.

An FPGA-compatible PLL-based sensor against fault injection attack

Makoto Nagata, Wei He, Shivam Bhasin, 2017, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).

Practical Evaluation of FSE 2016 Customized Encoding Countermeasure

Thomas Peyrin, Shivam Bhasin, Dirmanto Jap, 2017, IACR Trans. Symmetric Cryptol..

Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA

Sylvain Guilley, Florent Flament, Jean-Luc Danger, 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.

On the Performance of Deep Learning for Side-channel Analysis

Axel Legay, Annelie Heuser, Shivam Bhasin, 2018, IACR Cryptol. ePrint Arch..

Fault attacks, injection techniques and tools for simulation

Shivam Bhasin, Francesco Regazzoni, Roberta Piscitelli, 2015, 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Side-channel leakage on silicon substrate of CMOS cryptographic chip

Jean-Luc Danger, Yu-ichi Hayashi, Makoto Nagata, 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

Cheap and Cheerful: A Low-Cost Digital Sensor for Detecting Laser Fault Injection Attacks

Wei He, Shivam Bhasin, Jakub Breier, 2016, SPACE.

Exploiting Determinism in Lattice-based Signatures: Practical Fault Attacks on pqm4 Implementations of NIST Candidates

Mahabir Prasad Jhanwar, Anupam Chattopadhyay, Shivam Bhasin, 2019, AsiaCCS.

Breaking Redundancy-Based Countermeasures with Random Faults and Power Side Channel

Debdeep Mukhopadhyay, Pallab Dasgupta, Shivam Bhasin, 2018, 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).

Comprehensive Laser Sensitivity Profiling and Data Register Bit-Flips for Cryptographic Fault Attacks in 65 Nm FPGA

Wei He, Shivam Bhasin, Chee Lip Gan, 2016, SPACE.

Unrolling Cryptographic Circuits: A Simple Countermeasure Against Side-Channel Attacks

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2010, CT-RSA.

Attack sensing against EM leakage and injection

Shivam Bhasin, Noriyuki Miura, 2016, 2016 International SoC Design Conference (ISOCC).

PLL to the rescue: A novel EM fault countermeasure

Jean-Luc Danger, Makoto Nagata, Wei He, 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

SoK: On DFA Vulnerabilities of Substitution-Permutation Networks

Thomas Peyrin, Shivam Bhasin, Zakaria Najm, 2019, IACR Cryptol. ePrint Arch..

Efficient Dual-Rail Implementations in FPGA Using Block RAMs

Sylvain Guilley, Jean-Luc Danger, Youssef Souissi, 2011, 2011 International Conference on Reconfigurable Computing and FPGAs.

Make Some Noise: Unleashing the Power of Convolutional Neural Networks for Profiled Side-channel Analysis

Alan Hanjalic, Annelie Heuser, Shivam Bhasin, 2019, IACR Cryptol. ePrint Arch..

Linear complementary dual code improvement to strengthen encoded circuit against hardware Trojan horses

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2015, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA

Debdeep Mukhopadhyay, Sylvain Guilley, Jean-Luc Danger, 2018, J. Hardw. Syst. Secur..

The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations

Annelie Heuser, Shivam Bhasin, Francesco Regazzoni, 2018, IACR Cryptol. ePrint Arch..

Does it sound as it claims: a detailed side-channel security analysis of QuadSeal countermeasure

Sri Parameswaran, Shivam Bhasin, Darshana Jayasinghe, 2016, Conf. Computing Frontiers.

Vade mecum on side-channels attacks and countermeasures for the designer and the evaluator

Olivier Meynard, Sylvain Guilley, Jean-Luc Danger, 2011, 2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

PPAP and iPPAP: PLL-Based Protection Against Physical Attacks

Anupam Chattopadhyay, Shivam Bhasin, Jakub Breier, 2018, 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

An Industrial Outlook on Challenges of Hardware Security in Digital Economy - Extended Abstract -

Shivam Bhasin, Victor Lomné, Karim Tobich, 2017, SPACE.

Combining PUF with RLUTs

Debdeep Mukhopadhyay, Debapriya Basu Roy, Shivam Bhasin, 2019, ACM Trans. Embed. Comput. Syst..

From theory to practice of private circuit: A cautionary note

Debdeep Mukhopadhyay, Sylvain Guilley, Jean-Luc Danger, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Guessing Your PIN Right: Unlocking Smartphones with Publicly Available Sensor Data

Shivam Bhasin, Bernhard Jungk, David Berend, 2018, 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2011, IET Inf. Secur..

Toward Threat of Implementation Attacks on Substation Security: Case Study on Fault Detection and Isolation

Abhisek Ukil, Anupam Chattopadhyay, Shivam Bhasin, 2018, IEEE Transactions on Industrial Informatics.

Practical Fault Attack on Deep Neural Networks

Yang Liu, Lei Ma, Shivam Bhasin, 2018, CCS.

Side-channel leakage and trace compression using normalized inter-class variance

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2014, IACR Cryptol. ePrint Arch..

Encoding the state of integrated circuits: a proactive and reactive protection against hardware Trojans horses

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2014, WESS '14.

Supervised and unsupervised machine learning for side-channel based Trojan detection

Wei He, Shivam Bhasin, Dirmanto Jap, 2016, 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow

Sylvain Guilley, Florent Flament, Jean-Luc Danger, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

Enhancing Fault Tolerance of Neural Networks for Security-Critical Applications pdf

Debdeep Mukhopadhyay, Arnab Bag, Debapriya Basu Roy, 2019, ArXiv.

On Misuse of Nonce-Misuse Resistance : Adapting Differential Fault Attacks on (few) CAESAR Winners

Anupam Chattopadhyay, Shivam Bhasin, Mustafa Khairallah, 2019, 2019 IEEE 8th International Workshop on Advances in Sensors and Interfaces (IWASI).

SCADPA: Side-channel assisted differential-plaintext attack on bit permutation based ciphers

Shivam Bhasin, Dirmanto Jap, Jakub Breier, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

On Side-Channel Vulnerabilities of Bit Permutations: Key Recovery and Reverse Engineering

Shivam Bhasin, Dirmanto Jap, Jakub Breier, 2018, IACR Cryptol. ePrint Arch..

Template Attack on Blinded Scalar Multiplication with Asynchronous perf-ioctl Calls

Debdeep Mukhopadhyay, Sarani Bhattacharya, Shivam Bhasin, 2017, IACR Cryptol. ePrint Arch..

Towards Different Flavors of Combined Side Channel Attacks

Sylvain Guilley, Jean-Luc Danger, Youssef Souissi, 2012, CT-RSA.

Automated Profiling Method for Laser Fault Injection in FPGAs

Wei He, Shivam Bhasin, Chee Lip Gan, 2019, Automated Methods in Cryptographic Fault Analysis.

Malicious wave: A survey on actively tampering using electromagnetic glitch

Paolo Maistri, Shivam Bhasin, Francesco Regazzoni, 2014, 2014 International Symposium on Electromagnetic Compatibility, Tokyo.

Extensive Laser Fault Injection Profiling of 65 nm FPGA

Wei He, Shivam Bhasin, Chee Lip Gan, 2017, J. Hardw. Syst. Secur..

Side-Channel Assisted Fault Analysis

Debdeep Mukhopadhyay, Sikhar Patranabis, Shivam Bhasin, 2018 .

Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security

Habib Mehrez, Jean-Luc Danger, Shivam Bhasin, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Improving Speed of Dilithium's Signing Procedure

Anupam Chattopadhyay, Shivam Bhasin, Sourav Sengupta, 2019, IACR Cryptol. ePrint Arch..

Ring Oscillator under Laser: Potential of PLL-based Countermeasure against Laser Fault Injection

Makoto Nagata, Wei He, Shivam Bhasin, 2016, 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).

Reconfigurable LUT: Boon or Bane for Secure Applications

Debdeep Mukhopadhyay, Sylvain Guilley, Jean-Luc Danger, 2015, IACR Cryptol. ePrint Arch..

Transform-and-Encode: A Countermeasure Framework for Statistical Ineffective Fault Attacks on Block Ciphers

Debdeep Mukhopadhyay, Debapriya Basu Roy, Avik Chakraborti, 2019, IACR Cryptol. ePrint Arch..

Don't fall into a trap: Physical side-channel analysis of ChaCha20-Poly1305

Shivam Bhasin, Bernhard Jungk, S. Bhasin, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

DeepLaser: Practical Fault Attack on Deep Neural Networks.

Yang Liu, Lei Ma, Shivam Bhasin, 2018, 1806.05859.

CSI Neural Network: Using Side-channels to Recover Your Artificial Neural Network Information

Lejla Batina, Shivam Bhasin, Stjepan Picek, 2018, IACR Cryptol. ePrint Arch..

Integrated Sensor: A Backdoor for Hardware Trojan Insertions?

Sylvain Guilley, Jean-Luc Danger, Debapriya Basu Roy, 2015, 2015 Euromicro Conference on Digital System Design.

A Practical Fault Attack on ARX-Like Ciphers with a Case Study on ChaCha20

Debdeep Mukhopadhyay, Sikhar Patranabis, Anupam Chattopadhyay, 2017, 2017 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).

A systematic security analysis of real-time cyber-physical systems

Arvind Easwaran, Anupam Chattopadhyay, Shivam Bhasin, 2017, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).

Persistent Fault Analysis on Block Ciphers

Wei He, Xinjie Zhao, Shivam Bhasin, 2018, IACR Trans. Cryptogr. Hardw. Embed. Syst..

Support vector regression: exploiting machine learning techniques for leakage modeling

Shivam Bhasin, Marc Stöttinger, Dirmanto Jap, 2015, HASP@ISCA.

Fault Injection Attacks: Attack Methodologies, Injection Techniques and Protection Mechanisms - A Tutorial

Debdeep Mukhopadhyay, Shivam Bhasin, 2016, SPACE.

Experimental Evaluation of Deep Neural Network Resistance Against Fault Injection Attacks

Lei Ma, Shivam Bhasin, Yang Liu, 2019, IACR Cryptol. ePrint Arch..

Method taking into account process dispersion to detect hardware Trojan Horse by side-channel analysis

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2016, Journal of Cryptographic Engineering.

Generic Side-channel attacks on CCA-secure lattice-based PKE and KEM schemes

Anupam Chattopadhyay, Shivam Bhasin, Sujoy Sinha Roy, 2019, IACR Cryptol. ePrint Arch..

A study on analyzing side-channel resistant encoding schemes with respect to fault attacks

Shivam Bhasin, Dirmanto Jap, Jakub Breier, 2017, Journal of Cryptographic Engineering.

Automated Evaluation of Concurrent Error Detection Code Protected Hardware Implementations

Anupam Chattopadhyay, Shivam Bhasin, Dirmanto Jap, 2019, Automated Methods in Cryptographic Fault Analysis.

Attacks in Reality: the Limits of Concurrent Error Detection Codes Against Laser Fault Injection

Wei He, Anupam Chattopadhyay, Shivam Bhasin, 2017, Journal of Hardware and Systems Security.

Side-channel Assisted Existential Forgery Attack on Dilithium - A NIST PQC candidate

Mahabir Prasad Jhanwar, Anupam Chattopadhyay, Shivam Bhasin, 2018, IACR Cryptol. ePrint Arch..

On the Performance of Convolutional Neural Networks for Side-Channel Analysis

Axel Legay, Annelie Heuser, Shivam Bhasin, 2018, SPACE.

Cryptographically Secure Shield for Security IPs Protection

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2017, IEEE Transactions on Computers.

One Plus One is More than Two: A Practical Combination of Power and Fault Analysis Attacks on PRESENT and PRESENT-Like Block Ciphers

Debdeep Mukhopadhyay, Sikhar Patranabis, Shivam Bhasin, 2017, 2017 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).

Mind the Portability: A Warriors Guide through Realistic Profiled Side-channel Analysis

Annelie Heuser, Anupam Chattopadhyay, Shivam Bhasin, 2019, IACR Cryptol. ePrint Arch..

Security evaluation of different AES implementations against practical setup time violation attacks in FPGAs

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2009, 2009 IEEE International Workshop on Hardware-Oriented Security and Trust.

Correlation power analysis using bit-level biased activity plaintexts against AES cores with countermeasures

Jean-Luc Danger, Makoto Nagata, Takafumi Aoki, 2014, 2014 International Symposium on Electromagnetic Compatibility, Tokyo.

WDDL is Protected against Setup Time Violation Attacks

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2009, 2009 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).

An electromagnetic fault injection sensor using Hogge phase-detector

Wei He, Shivam Bhasin, Jakub Breier, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

Protecting block ciphers against differential fault attacks without re-keying

Thomas Peyrin, Shivam Bhasin, Mustafa Khairallah, 2018, 2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

Number "Not" Used Once - Key Recovery Fault Attacks on LWE Based Lattice Cryptographic Schemes

Anupam Chattopadhyay, Shivam Bhasin, Prasanna Ravi, 2018, IACR Cryptol. ePrint Arch..

DFARPA: Differential fault attack resistant physical design automation

Debdeep Mukhopadhyay, Anupam Chattopadhyay, Rajat Subhra Chakraborty, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology

Jean-Luc Danger, Makoto Nagata, Shivam Bhasin, 2014, ES4CPS@DATE.

The other side of the coin: Analyzing software encoding schemes against fault injection attacks

Shivam Bhasin, Dirmanto Jap, Jakub Breier, 2016, 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

CC Meets FIPS: A Hybrid Test Methodology for First Order Side Channel Analysis

Debdeep Mukhopadhyay, Sylvain Guilley, Debapriya Basu Roy, 2019, IEEE Transactions on Computers.

Hardware Trojan Horses in Cryptographic IP Cores

Sylvain Guilley, Jean-Luc Danger, Shivam Bhasin, 2013, 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography.

Differential Fault Attack Resistant Hardware Design Automation

Anupam Chattopadhyay, Shivam Bhasin, Mustafa Khairallah, 2019, Automated Methods in Cryptographic Fault Analysis.

Challenges in designing trustworthy cryptographic co-processors

Giorgio Di Natale, Nele Mentens, Apostolos P. Fournaris, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Reconfigurable LUT: A Double Edged Sword for Security-Critical Applications

Debdeep Mukhopadhyay, Sylvain Guilley, Jean-Luc Danger, 2015, SPACE.

Mistakes Are Proof That You Are Trying: On Verifying Software Encoding Schemes' Resistance to Fault Injection Attacks

Shivam Bhasin, Dirmanto Jap, Jakub Breier, 2016, IACR Cryptol. ePrint Arch..

Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis

Jean-Luc Danger, Eduardo de la Torre, Wei He, 2015, IET Inf. Secur..

BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation

Sylvain Guilley, Jean-Luc Danger, Maxime Nassar, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Feature Selection Methods for Non-Profiled Side-Channel Attacks on ECC

Shivam Bhasin, Zakaria Najm, Dirmanto Jap, 2018, 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP).

A Systematic Side-Channel Evaluation of Black Box AES in Secure MCU: Architecture Recovery and Retrieval of PUF Based Secret Key

Shivam Bhasin, Yoo-Seung Won, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

On Use of Deep Learning for Side Channel Evaluation of Black Box Hardware AES Engine

Shivam Bhasin, Yoo-Seung Won, S. Bhasin, 2021 .

Are Cold Boot Attacks Still Feasible: A Case Study on Raspberry Pi With Stacked Memory

Shivam Bhasin, Yoo-Seung Won, 2021, 2021 Workshop on Fault Detection and Tolerance in Cryptography (FDTC).

Attacking and Defending Masked Polynomial Comparison for Lattice-Based Cryptography

Shivam Bhasin, Jan-Pieter D'Anvers, Thomas Pöppelmann, 2021, IACR Cryptol. ePrint Arch..

Explain Some Noise: Ablation Analysis for Deep Learning-based Physical Side-channel Analysis

Shivam Bhasin, Stjepan Picek, Guilherme Perin, 2021, IACR Cryptol. ePrint Arch..

Comprehensive Study of Side-Channel Attack on Emerging Non-Volatile Memories

Swaroop Ghosh, Anupam Chattopadhyay, Shivam Bhasin, 2021, Journal of Low Power Electronics and Applications.

Generic Side-Channel Assisted Chosen-Ciphertext Attacks on Streamlined NTRU Prime

Anupam Chattopadhyay, Shivam Bhasin, Sujoy Sinha Roy, 2021, IACR Cryptol. ePrint Arch..

Special Section on Attacking and Protecting Artificial Intelligence

Siddharth Garg, Shivam Bhasin, Francesco Regazzoni, 2021, CAAI Transactions on Intelligence Technology.

DeepFreeze: Cold Boot Attacks and High Fidelity Model Recovery on Commercial EdgeML Device

Arindam Basu, Shivam Bhasin, Dirmanto Jap, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Time to Leak: Cross-Device Timing Attack On Edge Deep Learning Accelerator

Arindam Basu, Shivam Bhasin, Dirmanto Jap, 2021, 2021 International Conference on Electronics, Information, and Communication (ICEIC).

Fault injection attacks on SoftMax function in deep neural networks

Shivam Bhasin, Dirmanto Jap, Yoo-Seung Won, 2021, CF.

WaC: First Results on Practical Side-Channel Attacks on Commercial Machine Learning Accelerator

Arindam Basu, Shivam Bhasin, Dirmanto Jap, 2021, ASHES@CCS.

Lattice-based Key-sharing Schemes

Anupam Chattopadhyay, Shivam Bhasin, James Howe, 2021, ACM Comput. Surv..

DEFAULT: Cipher Level Resistance Against Differential Fault Attack

Thomas Peyrin, Shivam Bhasin, Sumanta Sarkar, 2021, IACR Cryptol. ePrint Arch..

Extraction of Binarized Neural Network Architecture and Secret Parameters Using Side-Channel Information

Shivam Bhasin, Naofumi Homma, Ville Yli-Mäyry, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Will You Cross the Threshold for Me? Generic Side-Channel Assisted Chosen-Ciphertext Attacks on NTRU-based KEMs

Anupam Chattopadhyay, Shivam Bhasin, Sujoy Sinha Roy, 2021, IACR Trans. Cryptogr. Hardw. Embed. Syst..

Practical Multiple Persistent Faults Analysis

Nasour Bagheri, Shivam Bhasin, Hadi Soleimany, 2021, IACR Cryptol. ePrint Arch..

Physical security of deep learning on edge devices: Comprehensive evaluation of fault injection attack vectors

Shivam Bhasin, Dirmanto Jap, Jakub Breier, 2021 .

Mitigating Power Attacks through Fine-Grained Instruction Reordering pdf

Shivam Bhasin, Romain Poussier, Trevor E. Carlson, 2021, ArXiv.

A Finer-Grain Analysis of the Leakage (Non) Resilience of OCB

Shivam Bhasin, Romain Poussier, François-Xavier Standaert, 2021, IACR Trans. Cryptogr. Hardw. Embed. Syst..

Unleashing the Power of Convolutional Neural Networks for Profiled Side-channel Analysis

Alan Hanjalic, Annelie Heuser, Shivam Bhasin, 2019 .