Yiqian Zhang

Path-based timing optimization by buffer insertion with accurate delay model

Qiang Zhou, Xianlong Hong, Yici Cai, 2003, ASICON 2003.

DeepM6ASeq: prediction and characterization of m6A-containing sequences using deep learning

Michiaki Hamada, Yiqian Zhang, Michiaki Hamada, 2018, BMC Bioinformatics.

Intelligent Passenger-Flow-Control Scheme at Subway Stations in Smart City

Yuan Zhang, Jinyang Zhang, Congduan Li, 2020 .

A gridless router based on hierarchical PB corner stitching structure

Xianlong Hong, Yan Zhang, Min Xie, 2002, IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions.

An efficient algorithm for buffered routing tree construction under fixed buffer locations with accurate delay models

Yici Cai, Xianlong Hong, Yiqian Zhang, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Data-path layout design inside SOC

Xianlong Hong, Weimin Wu, Tong Jing, 2002, IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions.