Peter Lee

发表

Double precision floating-point arithmetic on FPGAs

Stavros Paschalakis, Peter Lee, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Hybrid-logarithmic arithmetic and applications

Peter Lee, 2011 .

Logarithmic Codecs for Adaptive Beamforming in WCDMA Downlink Channels

John C. Batchelor, Richard J. Langley, Peter Lee, 2007, 2007 IEEE International Symposium on Circuits and Systems.

On the Accuracy of Digital Phase Sensitive Detectors Implemented in FPGA Technology

Jean-Jacques Vandenbussche, Joan Peuteman, Peter Lee, 2014, IEEE Transactions on Instrumentation and Measurement.

An FPGA implementation of a flexible, parallel image processing architecture suitable for embedded vision systems

Peter Lee, Stephanie McBader, P. Lee, 2003, Proceedings International Parallel and Distributed Processing Symposium.

An FPGA System for the High Speed Extraction, Normalization and Classification of Moment Descriptors

Miroslaw Bober, Stavros Paschalakis, Peter Lee, 2003, FPL.

On the coefficient quantization of Multiplicative FIR filters

Jean-Jacques Vandenbussche, Joan Peuteman, Peter Lee, 2013, Digit. Signal Process..

Multiplicative finite impulse response filters: implementations and applications using field programmable gate arrays

Jean-Jacques Vandenbussche, Joan Peuteman, Peter Lee, 2015, IET Signal Process..

Analysis of Time and Frequency Domain Performance of MFIR Filters

Jean-Jacques Vandenbussche, Joan Peuteman, Peter Lee, 2008, ESA.

Vision Systems-on-Chip: General Purpose Architectures and Limitations

S. McBader, Peter Lee, 2003 .

Cellular Automata Based Binary Arithmetic for use on Self Repairing, Fault Tolerant Hardware

Peter Lee, James Lloyd Weston, 2007, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007).

Special-purpose parallel architectures for high-performance machine learning

Roberto Battiti, Alvise Sartori, Giampietro Tecchiolli, 1995, HPCN Europe.

Statistical Pattern Recognition Using the Normalized Complex Moment Components Vector

Stavros Paschalakis, Peter Lee, P. Lee, 2000, SSPR/SPR.

Two-stage logarithmic converter with reduced memory requirements

Mandeep Chaudhary, Peter Lee, 2014, IET Comput. Digit. Tech..

An FPFA Based Object Recognition Machine

Ali Zakerolhosseini, Peter Lee, Ed Horne, 1998, FPL.

The use of hybrid logarithmic arithmetic for root raised cosine matched filters in WCDMA downlink receivers

John C. Batchelor, Richard J. Langley, Peter Lee, 2005, IEEE Wireless Communications and Networking Conference, 2005.

FPGA Implementation of Cellular Automata Spaces Using a CAM Based Cellular Architecture

Peter Lee, James Lloyd Weston, 2008, 2008 NASA/ESA Conference on Adaptive Hardware and Systems.

Lorenz chaotic model using Filed Programmable Gate Array (FPGA)

Peter Lee, Mohammed Aseeri, M. I. Sobhy, 2002, The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002..

An Efficient Implementation of a 2D DWT on FPGA

Peter Lee, Michael Wisdom, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Fast and compact controllers with digital neural networks

Alvise Sartori, Alessandro Zorat, Ignazio Lazzizzera, 1997, IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings.

On-line Non-Intrusive Measurement of Particle Size Distribution Through Digital Imaging

Yong Yan, Robert M. Carter, Peter Lee, 2005, 2005 IEEE Instrumentationand Measurement Technology Conference Proceedings.

LogTOTEM: A Logarithmic Neural Processor and its Implementation on an FPGA Fabric

Alvise Sartori, Luca Clementel, Peter Lee, 2007, 2007 International Joint Conference on Neural Networks.

SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor

Andrea Boni, Alvise Sartori, Luca Clementel, 2002, FPL.

An Unbounded Parallel Binary Tree Adder for use on a Cellular Platform

Peter Lee, James Lloyd Weston, P. Lee, 2007, 2007 IEEE Symposium on Artificial Life.

Least squares adaptive algorithms suitable for multiplierless LMMSE detection in 3/sup rd/ generation mobile systems

John C. Batchelor, Richard J. Langley, Peter Lee, 2005, 2005 IEEE 16th International Symposium on Personal, Indoor and Mobile Radio Communications.

A programmable image signal processing architecture for embedded vision systems

S. McBader, Peter Lee, 2002, 2002 14th International Conference on Digital Signal Processing Proceedings. DSP 2002 (Cat. No.02TH8628).