H. Iwai

发表

0.12 /spl mu/m raised gate/source/drain epitaxial channel NMOS technology

T. Ohguro, H. Naruse, H. Sugaya, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Estimation of process variation impact on DG-FinFET device performance using Plackett-Burman design of experiment method

H. Iwai, A.N. Chandorkar, S. Mande, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

ply to "Comments on 'Small Geometry ' Transistor Capacitance Measurement od Using Sim

H. Iwai, 1985 .

Analysis of Carrier Transport and Heating in Ultra-Small SOI N-MOSFETs

H. Iwai, B. Ricco, C. Fiegna, 1993, ESSDERC '93: 23rd European solid State Device Research Conference.

Recent status on Nano CMOS and future direction

H. Iwai, H. Iwai, 2006, 2006 International Workshop on Nano CMOS.

Development of Pure Bending Testing Methods for Advanced Compostite Materials.

H. Iwai, M. Uemura, S. Uemura, 1994 .

Nano-CMOS Technology for Next Fifteen Years

H. Iwai, H. Wong, 2006, TENCON 2006 - 2006 IEEE Region 10 Conference.

Impact of Process variations on Leakage Power in CMOS Circuits in Nano Era (Invited paper)

H. Iwai, A.N. Chandorkar, Ch. Ragunandan, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

Future of silicon integrated circuit technology

H. Iwai, 2007, 2007 International Conference on Industrial and Information Systems.

Future perspective and scaling down roadmap for RF CMOS

T. Ohguro, H. Kimijima, E. Morifuji, 1999, 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).

Comparison of Ti and Ni salicides as regards the electrical conductance of silicided films

T. Ohguro, H. Iwai, Y. Ushiku, 1993, ESSDERC '93: 23rd European solid State Device Research Conference.

A balance-fed planar built-in antenna

Koichi Ogawa, H. Iwai, Y. Koyanagi, 2000 .

Local-field-enhancement model of DRAM retention failure

H. Iwai, M. Ogasawara, Y. Itoh, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Semiconductor Manufacturing Technology in the 21st Century

H. Iwai, H. Iwai, 2006, 2006 International Symposium on VLSI Technology, Systems, and Applications.

1.2μm Bi-CMOS Technology with High Performance ECL

H. Iwai, K. Kanzaki, M. Norishima, 1987, ESSDERC '87: 17th European Solid State Device Research Conference.

CMOS technology future

H. Iwai, 2004, Proceedings of the Fifth IEEE International Caracas Conference on Devices, Circuits and Systems, 2004..

Theoretical analysis on influence of spatial and temporal dispersion of a propagation channel for combined RAKE and phased array in mobile CDMA systems

James R. Zeidler, H. Iwai, L. B. Milstein, 1997, Proceedings of 8th International Symposium on Personal, Indoor and Mobile Radio Communications - PIMRC '97.

Experimental verification of a 3D scaling principle for low Vce(sat) IGBT

K. Kakushima, I. Omura, H. Iwai, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

Future of CMOS technology

H. Iwai, 2004, 2004 Semiconductor Manufacturing Technology Workshop Proceedings (IEEE Cat. No.04EX846).

Future of Nano-CMOS Technology and Its Production

H. Iwai, H. Iwai, 2006, 2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits.

An experimental study on antenna height dependence of service area in residential micro-cellular mobile radio

H. Iwai, 1995 .

On-chip capacitance measurement circuits in VSLI structures

H. Iwai, S. Kohyama, 1982, IEEE Transactions on Electron Devices.

Future semiconductor manufacturing: challenges and opportunities

H. Iwai, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

0.2 /spl mu/m analog CMOS with very low noise figure at 2 GHz operation

E. Morifuji, H.S. Momose, H. Iwai, 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

A Low-Profile Bi-Directional Cavity Antenna with Broadband Impedance Characteristics

Koichi Ogawa, H. Iwai, A. Yamamoto, 2001 .

Reverse Current of Plasma Doped p+/n Ultra-Shallow Junction

K. Kakushima, H. Iwai, B. Mizuno, 2005, Extended Abstracts of the Fifth International Workshop on Junction Technology.

A New Scaling Methodology For The 0.1 - 0.025/spl mu/m MOSFET

H. Iwai, B. Ricco, C. Fiegna, 1993, Symposium 1993 on VLSI Technology.

Two-dimensional computer simulation models for MOSLSI fabrication processes

H. Iwai, K. Taniguchi, H. Iwai, 1981, IEEE Transactions on Electron Devices.

On-chip spiral inductors with diffused shields using channel-stop implant

T. Ohguro, H. Kimijima, E. Morifuji, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

A Low-stress Trench Isolation Structure And Its Electrical Characteristics Of Sub 20 Ps High-speed ECL

Y. Katsumata, H. Iwai, H. Nakajima, 1993, Symposium 1993 on VLSI Technology.

Nanoscale electrical and physical study of polycrystalline high-κ dielectrics and proposed reliability enhancement techniques

K. Kakushima, H. Iwai, Z. R. Wang, 2011, 2011 International Reliability Physics Symposium.

Ultra-thin gate oxides-performance and reliability

H. Iwai, H. Iwai, H. Momose, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Ultra-Shallow Buried-Channel P-MOSFET With Extremely High Transconductance

T. Yoshitomi, H. Iwai, Y. Akasaka, 1993, Symposium 1993 on VLSI Technology.

Process induced damage on RFCMOS

T. Ohguro, H. Kimijima, E. Morifuji, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Analysis and Simulation of the Postbreakdown $I-V$ Characteristics of n-MOS Transistors in the Linear Response Regime

K. Kakushima, H. Iwai, J. Sune, 2013, IEEE Electron Device Letters.

Roadmap for 22 nm and beyond

H. Iwai, H. Iwai, 2009 .

B/sub 2/H/sub 6/ plasma doping with "in-situ He pre-amorphization"

H. Iwai, S. Ohmi, B. Mizuno, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

An SPDD p-MOSFET structure suitable for 0.1 and sub 0.1 micron channel length and its electrical characteristics

T. Yoshitomi, Y. Katsumata, H. Iwai, 1992, 1992 International Technical Digest on Electron Devices Meeting.

Si/Ni-Silicide Schottky junctions with atomically flat interfaces using NiSi2 source

K. Kakushima, H. Iwai, K. Ohmori, 2011, 2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC).

Modeling and characterization of radio-frequency characteristics of multi-finger nanometer MOS transistors

H. Iwai, K. Kakusima, S. L. Siu, 2009, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

EOT of 0.62 nm and High Electron Mobility in La-silicate/Si Structure Based nMOSFETs Achieved by Utilizing Metal-Inserted Poly-Si Stacks and Annealing at High Temperature

K. Kakushima, H. Iwai, T. Hattori, 2012, IEEE Transactions on Electron Devices.

Analysis of process margins for emitter-base self-alignment structures through a combination of simulation and experiment

Y. Katsumata, H. Iwai, H. Nakajima, 1992, Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.

Study of the piezoresistive properties of NMOS and PMOS Ω-gate SOI nanowire transistors: Scalability effects and high stress level

G. Reimbold, H. Iwai, M. Casse, 2014, 2014 IEEE International Electron Devices Meeting.

Fundamental origin of excellent low-noise property in 3D Si-MOSFETs ∼ Impact of charge-centroid in the channel due to quantum effect on 1/f noise ∼

K. Kakushima, H. Iwai, K. Ohmori, 2011, 2011 International Electron Devices Meeting.

Latchup-free CMOS structure using shallow trench isolation

H. Iwai, K. Kanzaki, H. Fuji, 1985, 1985 International Electron Devices Meeting.

Charged defects reduction in gate insulator with multivalent materials

K. Kakushima, H. Iwai, N. Umezawa, 2006, 2009 Symposium on VLSI Technology.

Rare earth metal oxide gate thin films prepared by e-beam deposition

H. Iwai, S. Ohmi, H. Ishiwara, 2001, Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 (IEEE Cat. No.01EX537).

A self-aligned emitter base NiSi electrode technology for advanced high-speed bipolar LSIs

Y. Katsumata, H. Iwai, H. Nakajima, 1992, Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.

Hot-Carrier Reliability of S4D n-MOSFETs

T. Ohguro, T. Yoshitomi, H. Iwai, 1996, ESSDERC '96: Proceedings of the 26th European Solid State Device Research Conference.

Prevention of boron penetration from p+ poly gate by RTN produced thin gate oxide

H. Iwai, H. S. Momose, T. Morimoto, 1990, ESSDERC '90: 20th European Solid State Device Research Conference.

High-frequency AC characteristics of 1.5 nm gate oxide MOSFETs

E. Morifuji, T. Yoshitomi, Y. Katsumata, 1996, International Electron Devices Meeting. Technical Digest.

A study of hot-carrier degradation in n- and p-MOSFETs with ultra-thin gate oxides in the direct-tunneling regime

T. Ohguro, E. Morifuji, T. Yoshitomi, 1997, International Electron Devices Meeting. IEDM Technical Digest.

Alternative dielectrics for advanced SOI MOSFETs: thermal properties and short channel effects

C. Mazure, H. Iwai, S. Cristoloveanu, 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).

A NiSi salicide technology for advanced logic devices

Y. Katsumata, H. Iwai, H. Nakajima, 1991, International Electron Devices Meeting 1991 [Technical Digest].

Nonscaling of MOSFET's linear resistance in the deep submicrometer regime

H. Iwai, B. Ricco, D. Esseni, 1998, IEEE Electron Device Letters.

CMOS technology after reaching the scale limit

H. Iwai, H. Iwai, 2008, Extended Abstracts - 2008 8th International Workshop on Junction Technology (IWJT '08).

A 62.8 GHz fmax LP-CVD epitaxially grown silicon base bipolar transistor with extremely high early voltage of 85.7 V

Y. Katsumata, H. Iwai, H. Nakajima, 1995, 1995 Symposium on VLSI Technology. Digest of Technical Papers.

Advanced gate dielectric materials for sub-100 nm CMOS

H. Iwai, S. Ohmi, I. Ueda, 2002, Digest. International Electron Devices Meeting,.

High performance 0.15 /spl mu/m single gate Co salicide CMOS

T. Ohguro, E. Morifuji, T. Yoshitomi, 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

Valence number transition and silicate formation of cerium oxide films on Si(100)

H. Iwai, Nobuyuki Sugii, Kuniyuki Kakushima, 2012 .

High efficiency 2 GHz power Si-MOSFET design under low supply voltage down to 1 V

T. Ohguro, E. Morifuji, T. Yoshitomi, 1996, International Electron Devices Meeting. Technical Digest.

A novel selective Ni/sub 3/Si contact plug technique for deep-submicron ULSIs

T. Ohguro, H. Iwai, I. Kunishima, 1992, 1992 Symposium on VLSI Technology Digest of Technical Papers.

Analysis of conductivity in ultra-shallow p/sup +/ layers formed by plasma doping

K. Kakushima, H. Iwai, Y. Sasaki, 2005, Extended Abstracts of the Fifth International Workshop on Junction Technology.

Feasibility study of plasma doping on Si substrates with photo-resist patterns

K. Kakushima, H. Iwai, Y. Sasaki, 2005, Extended Abstracts of the Fifth International Workshop on Junction Technology.

Properties of CeOx/La2O3 gate dielectric and its effects on the MOS transistor characteristics

H. Iwai, Kuniyuki Kakushima, Hei Wong, 2012 .

Bipolar transistor design for low process-temperature 0.5 mu m Bi-CMOS

H. Iwai, K. Maeguchi, M. Norishima, 1989, International Technical Digest on Electron Devices Meeting.

Data retention time in DRAM with WSi/sub x//P/sup +/poly-Si gate NMOS cell transistors

H. Iwai, K. Ohyu, M. Moniwa, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Analysis of an ONO gate film effect on n- and p-MOSFET mobilities

H. Iwai, S. Takagi, S. Onga, 1990, Digest of Technical Papers.1990 Symposium on VLSI Technology.

A study of flicker noise in n- and p-MOSFETs with ultra-thin gate oxide in the direct-tunneling regime

Y. Miyahara, T. Ohguro, H. Kimijima, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).