Valentin de Armas

发表

A compact layout technique to minimize high frequency switching effects in high speed circuits

Saeid Nooshabadi, Juan A. Montiel-Nelson, Valentin de Armas, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

An Efficient Double-Filter Hardware Architecture for H.264/AVC Deblocking Filtering

Gustavo Marrero Callicó, Roberto Sarmiento, Félix Tobajas, 2008, IEEE Transactions on Consumer Electronics.

An OCCAM circle generator program implemented in VLSI

Juan A. Montiel-Nelson, Valentin de Armas, D. Q. M. Fay, 1993, Microprocess. Microprogramming.

A cell and macrocell compiler for GaAs VLSI full-custom design

Roberto Sarmiento, Juan A. Montiel-Nelson, Valentin de Armas, 1998, Proceedings Design, Automation and Test in Europe.

High speed GaAs subsytem design using feed through logic

Roberto Sarmiento, Saeid Nooshabadi, Juan A. Montiel-Nelson, 1999, DATE '99.

A compact layout technique for reducing switching current effects in high speed circuits

Juan A. Montiel-Nelson, Valentin de Armas, Roberto Sarmiento, 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

Supporting students with special needs at university through peer mentoring

Félix Tobajas, Valentin de Armas, Ma Dolores Cabello, 2014, 2014 IEEE Global Engineering Education Conference (EDUCON).

Hardware platform for wide-area vehicular sensor networks with mobile nodes

Valentin de Armas, Félix Tobajas, Roberto Esper-Chaín, 2016, Veh. Commun..

Medical Diagnosis Improvement Through Image Quality Enhancement Based on Super-Resolution

Sebastián López, Gustavo Marrero Callicó, José Francisco López, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

Split-engine packet classification: a novel approach to multi-field packet classification on high performance routers with QoS support

Roberto Sarmiento, Valentin de Armas, Félix Tobajas, 2004, IEEE Global Telecommunications Conference, 2004. GLOBECOM '04..

Video super resolution algorithm implemented on a low-cost NoC-based MPSoC platform

Félix Tobajas, Valentin de Armas, Garbi Singla, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

Round-trip delay effect on iterative request-grant-accept scheduling algorithms for virtual output queue switches

José Francisco López, Roberto Sarmiento, Valentin de Armas, 2002, Global Telecommunications Conference, 2002. GLOBECOM '02. IEEE.

A gigabit multidrop serial backplane for high-speed digital systems based on asymmetrical power splitter

Roberto Sarmiento, Valentin de Armas, Félix Tobajas, 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.

Experimental gigabit multidrop serial backplane for high speed digital systems

Roberto Sarmiento, Valentin de Armas, Félix Tobajas, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Low cost efficient architecture for H.264 motion estimation

Sebastián López, José Francisco López, Roberto Sarmiento, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Using the ES2 library and SILOS simulator in the development of a single chip with three processors and analog IO

Juan A. Montiel-Nelson, Valentin de Armas, D. Q. M. Fay, 1993, 1993 Euromicro Workshop on Parallel and Distributed Processing.

GMDS: Hardware implementation of novel real output queuing architecture

Roberto Sarmiento, Valentin de Armas, Félix Tobajas, 2008, 2008 Design, Automation and Test in Europe.

Super-resolution with selective filter based on adaptive window and variable macro-block size

Eduardo Quevedo, Gustavo Marrero Callicó, Roberto Sarmiento, 2015, Journal of Real-Time Image Processing.

A CORDIC processor for FFT computation and its implementation using gallium arsenide technology

José Francisco López, Roberto Sarmiento, Juan A. Montiel-Nelson, 1998, IEEE Trans. Very Large Scale Integr. Syst..