Hieu Van Tran

IMPROVED SENSE AMPLIFIER CIRCUIT FOR READING DATA IN A FLASH MEMORY CELL

Hieu Van Tran, Ly Anh, Vu Thuan, 2019 .

A 16-minute 3-V analog storage and retrieval integrated circuit system using source-side injection flash technology

Albert V. Kordesch, Chun-Mai Liu, Hieu Van Tran, 1999, 1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453).

Split-Gate Floating Poly SuperFlash® Memory Technology, Design, and Reliability

Nhan Do, Alex Kotov, Vipin Tiwari, 2018, Embedded Flash Memory for Embedded Systems.

Vertical floating-gate 4.5F2 Split-gate NOR Flash Memory at llOnm Node

Feng Gao, Hieu Van Tran, Felix Tsui, 2004 .

FP 16.6: A 2.5V 256-Level Non-Volatile Analog Storage Device Using EEPROM Technology

Trevor Blyth, Tony Dunne, Tin Lam, 1995 .