Yeon-Jae Jung

A dual-loop delay-locked loop using multiple voltage-controlled delay lines

Wonchan Kim, Yeon-Jae Jung, Seung Wook Lee, 2001 .

A single-chip 2.4 GHz direct-conversion CMOS transceiver with GFSK modem for Bluetooth application

Deog-Kyoon Jeong, Kang-Yoon Lee, Wonchan Kim, 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

A dual-mode direct-conversion CMOS transceiver for Bluetooth and 802.11b

Deog-Kyoon Jeong, Inho Song, Wonchan Kim, 2003, ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).

A low jitter dual loop DLL using multiple VCDLs with a duty cycle corrector

Wonchan Kim, Yeon-Jae Jung, Daeyun Shim, 2000 .

Load-adaptive, low switching-noise output buffer

Wonchan Kim, Yeon-Jae Jung, Daeyun Shim, 1999 .

Low-jitter phase-locked loop based on pseudo-differential delay elements

Sungkyung Park, Wonchan Kim, Yeon-Jae Jung, 2001 .

Fast locking clock generator using analog synchronous mirror delay technique with feedback control

Wonchan Kim, Yeon-Jae Jung, Daeyun Shim, 2001, 2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443).

A load-adaptive, low switching-noise data output buffer

Chang-Hyun Kim, Wonchan Kim, Yeon-Jae Jung, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Generating the Confidence Interval of Time Averaged Estimator Using Threshold Bootstrap

Yeon-Jae Jung, Yun Bae Kim, Jeong Seok Kang, 2013, AsiaSim.

A 0.25-/spl mu/m CMOS quad-band GSM RF transceiver using an efficient LO frequency plan

Yeon-Jae Jung, Soo-Ik Chae, Eunseok Song, 2005 .