Ari Paasio

发表

Robust CMOS CNN implementation with respect to manufacturing inaccuracies

Kari Halonen, Ari Paasio, A. Dawidziuk, 1996, 1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96).

A 12-bit Current-Steering DAC with Calibration by Combination Selection

Ari Paasio, Kati Virtanen, Janne Maunu, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Effect of Mismatch on the Reliability of ON/OFF-Programmable CNNs

Victor M. Brea, Ari Paasio, Mika Laiho, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

A QCIF Resolution Binary I/O CNN-UM Chip

Kari Halonen, Ari Paasio, Veikko Porra, 1999, J. VLSI Signal Process..

A simple variable λ resistive network implementation.

Ari Paasio, A. Kananen, Kari Halonen, 2005 .

A novel and systematic implementation of thermometer-coded current-mode DAC

Ari Paasio, Mika Grönroos, 2017, 2017 European Conference on Circuit Theory and Design (ECCTD).

3-neighborhood motion estimation in CNN silicon architectures

Kari Halonen, Lauri Koskinen, Ari Paasio, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A mixed‐mode polynomial‐type CNN for analysing brain electrical activity in epilepsy

Kari Halonen, Ari Paasio, Mika Laiho, 2002, Int. J. Circuit Theory Appl..

A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakes

Victor M. Brea, Ari Paasio, Diego Cabello, 2005, 2005 IEEE International Symposium on Circuits and Systems.

CNN applications from the hardware point of view: video sequence segmentation

Kari Halonen, Ari Paasio, Mika Laiho, 2002, Int. J. Circuit Theory Appl..

Cellular nonlinear network implementation for nonlinear B-template

Kari Halonen, Ari Paasio, 2000, Proceedings of the 2000 6th IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA 2000) (Cat. No.00TH8509).

On the topographic equivalence between voltage mode and current mode ranked order filters for array processors

Ari Paasio, Jonne Poikonen, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A binary‐based on‐chip CNN solution for pixel‐level snakes

Victor M. Brea, Ari Paasio, Diego Cabello, 2006, Int. J. Circuit Theory Appl..

A Gray-coded digital-to-analog converter for a mixed-mode processor array

Ari Paasio, Jonne Poikonen, Laura Vesalainen, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A 32 /spl times/ 32 cellular test chip targeting new functionalities

Kari Halonen, Ari Paasio, Mika Laiho, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Dense CMOS implementation of a binary-programmable cellular neural network: Research Articles

Kari Halonen, Ari Paasio, J. Flak, 2006 .

Fast and Compact 16 by 16 Cellular Neural Network Implementation

Kari Halonen, Ari Paasio, Veikko Porra, 1997 .

Ultra low-power array processor propagation circuit arrangement

Ari Paasio, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Dense CMOS implementation of a binary‐programmable cellular neural network

Kari Halonen, Ari Paasio, Mika Laiho, 2006, Int. J. Circuit Theory Appl..

A capacitor mismatch insensitive technique for RSD cyclic ADC

Ari Paasio, Jia Sun, Hao Meng, 2011, 2011 20th European Conference on Circuit Theory and Design (ECCTD).

Additional local propagation stopper circuit for asynchronous binary wave computing

Ari Paasio, 2014, 2014 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA).

CNN shape segmentation advantages in MPEG-4 simple profile encoding

Kari Halonen, Lauri Koskinen, Ari Paasio, 2003, Seventh International Symposium on Signal Processing and Its Applications, 2003. Proceedings..

Seismocardiography: Toward heart rate variability (HRV) estimation

Ari Paasio, Eero Lehtonen, Tero Koivisto, 2015, 2015 IEEE International Symposium on Medical Measurements and Applications (MeMeA) Proceedings.

TOPS information processing on a single chip

Kari Halonen, Ari Paasio, Veikko Porra, 1998 .

Local asymmetric propagation stopper circuit for asynchronous binary wave computing

Ari Paasio, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

MIPA4k: Mixed-Mode Cellular Processor Array

Ari Paasio, Mika Laiho, Jonne Poikonen, 2011 .

Space-dependent binary image processing within a 64x64 mixed-mode array processor

Ari Paasio, Mika Laiho, Jonne Poikonen, 2009, 2009 European Conference on Circuit Theory and Design.

A Shape-Preserving Non-parametric Symmetry Transform

Esa Alhoniemi, Ari Paasio, Mika Laiho, 2006, 18th International Conference on Pattern Recognition (ICPR'06).

Implementation of an asynchronous current-mode ADC with adaptive quantization

Ari Paasio, Mika Laiho, Kati Virtanen, 2006, 2006 IEEE International Symposium on Circuits and Systems.

MPEG-4 encoder architecture for a shape segmentation CNN chip

Kari Halonen, Lauri Koskinen, Ari Paasio, 2001, Proceedings of Workshop and Exhibition on MPEG-4 (Cat. No.01EX511).

VLSI implementation of cellular neural network universal machine

Ari Paasio, A. Dawidziuk, Veikko Porra, 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

CNN applications from the hardware point of view: video sequence segmentation: Research Articles

Kari Halonen, Ari Paasio, Mika Laiho, 2002 .

A 48 by 48 CNN chip operating with B/W images

Kari Halonen, Ari Paasio, Veikko Porra, 1998, 1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196).

Implementation of a Fast and Low-Power Thermopile Readout Circuit Arrangement for Array Processors

Ari Paasio, Tapani Nevalainen, Mika Grönroos, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

Discrete time analog polynomial type CNN with digital state

Kari Halonen, Ari Paasio, Mika Laiho, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Effect of CNN shape segmentation on MPEG-4 shape bit-rate

Kari Halonen, Lauri Koskinen, Ari Paasio, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A cellular nonlinear network for digital error correction

Saska Lindfors, Ari Paasio, A. Kananen, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Comparison of 130 nm technology 6T and 8T SRAM cell designs for Near-Threshold operation

Ari Paasio, Mika Kutila, Teijo Lehtonen, 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

Simulations on 130 nm technology 6T SRAM cell for Near-Threshold operation

Ari Paasio, Mika Kutila, Teijo Lehtonen, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A mixed-mode polynomial-type CNN for analysing brain electrical activity in epilepsy: Research Articles

Kari Halonen, Ari Paasio, Mika Laiho, 2002 .

Parallel processor algorithm for variable block-size computation at low bitrates [video coding applications]

Kari Halonen, Lauri Koskinen, Ari Paasio, 2005, 2005 IEEE International Symposium on Circuits and Systems.

CNN-type algorithms for H.264 variable block-size partitioning

Lauri Koskinen, Ari Paasio, Kari Halonen, 2007, Signal Process. Image Commun..

A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing

Victor M. Brea, Ari Paasio, Diego Cabello, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Locally adaptive image sensing with the 64x64 cell MIPA4k mixed-mode image processor array

Ari Paasio, Mika Laiho, Jonne Poikonen, 2009, 2009 European Conference on Circuit Theory and Design.

Cellular nonlinear network implementation for packet selection

Ari Paasio, Veikko Porra, A. Kananen, 1998, 1998 Fifth IEEE International Workshop on Cellular Neural Networks and their Applications. Proceedings (Cat. No.98TH8359).

Embedded processing methods for online visual analysis of laser welding

Ari Paasio, Tero Säntti, Mika Laiho, 2016, Journal of Real-Time Image Processing.

A mixed-mode polynomial cellular array processor hardware realization

Kari Halonen, Ari Paasio, Mika Laiho, 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

An area-efficient full-wave current rectifier for analog array processing

Ari Paasio, Jonne Poikonen, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Compact VLSI implementation of cellular neural network

Ari Paasio, A. Dawidziuk, Veikko Porra, 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.

A/D and D/A converters in a mixed-mode CNN

Kari Halonen, Ari Paasio, Mika Laiho, 2002, Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications.

Realization of Couplings in a Polynomial Type Mixed-Mode Cellular Neural Network

Kari Halonen, Ari Paasio, Mika Laiho, 2003, Int. J. Neural Syst..

Online seam tracking for laser welding with a vision chip and FPGA enabled camera system

Ari Paasio, Tero Säntti, Mika Laiho, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

VLSI implementation of cellular neural network universal machine

Ari Paasio, A. Dawidziuk, Veikko Porra, 1996, Proceedings of Third International Conference on Electronics, Circuits, and Systems.

MPEG-4 based modifications for an CNN segmentation chip

Kari Halonen, Lauri Koskinen, Ari Paasio, 2002, Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications.

An analog array processor hardware realization with multiple new features

Kari Halonen, Ari Paasio, Mika Laiho, 2002, Proceedings of the 2002 International Joint Conference on Neural Networks. IJCNN'02 (Cat. No.02CH37290).

A Massively Parallel Face Recognition System

Ari Paasio, Mika Laiho, Janne Maunu, 2007, EURASIP J. Embed. Syst..

An Analog 2-D DCT Processor

Ari Paasio, Kati Virtanen, Mikko Pänkäälä, 2006, IEEE Transactions on Circuits and Systems for Video Technology.

An On-Chip Measurement Circuit for Calibration by Combination Selection

Ari Paasio, Mika Laiho, Janne Maunu, 2006, 2006 IEEE International SOC Conference.

High speed 16 by 16 CNN chip

Kari Halonen, Ari Paasio, A. Dawidziuk, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Effect of mismatch on the reliability of binary-programmable CNNs

Victor M. Brea, Ari Paasio, Mika Laiho, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Current mode cellular neural network with digitally adjustable template coefficients

Ari Paasio, A. Dawidziuk, Veikko Porra, 1994, Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems.

Design Techniques and Considerations for a 1.2V 10bit CMOS Pipeline ADC

Ari Paasio, Jia Sun, Hao Meng, 2011, 2011 UkSim 13th International Conference on Computer Modelling and Simulation.

Digitally controllable weights in current mode cellular neural networks

Kari Halonen, Ari Paasio, A. Dawidziuk, 1994, Proceedings of the Third IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA-94).

Relating Cellular Non-linear Networks to Threshold Logic and Single Instruction Multiple Data computing models

Victor M. Brea, Ari Paasio, Diego Cabello, 2007, 2007 18th European Conference on Circuit Theory and Design.

CheckerBoard binary CNN core

Ari Paasio, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A DTCNN CMOS Implementation of a Pixel-Level Snake Algorithm

Victor M. Brea, Ari Paasio, Diego Cabello, 2001 .

Overlapping issues in designing large CNNs

Kari Halonen, Ari Paasio, A. Kananen, 2000, Proceedings of the 2000 6th IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA 2000) (Cat. No.00TH8509).

A gray-code current-mode ADC for mixed-mode cellular computer

Ari Paasio, Jonne Poikonen, Mikko Pänkäälä, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A Compact Computational Core for Image Processing

Kari Halonen, Ari Paasio, Mika Laiho, 2001 .

Realization of an analog current-mode 2D DCT

Ari Paasio, Jonne Poikonen, Mikko Pänkäälä, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Fast thermopile readout circuit arrangement for array processors

Ari Paasio, Jonne Poikonen, Tapani Nevalainen, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Realization of couplings in a polynomial type mixed-mode CNN

Kari Halonen, Ari Paasio, Mika Laiho, 2002, Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications.

Implementation oriented theory design issues on the DTCNN template generation

Victor M. Brea, Ari Paasio, Diego Cabello, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Dynamically coupled multi-layer mixed-mode CNN

Ari Paasio, Mika Laiho, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A binary-based on-chip CNN solution for pixel-level snakes: Research Articles

Victor M. Brea, Ari Paasio, Diego Cabello, 2006 .

Rate-distortion performance analysis of an analog motion estimation array

Lauri Koskinen, Ari Paasio, Mika Laiho, 2010, 2010 IEEE International Conference on Acoustics, Speech and Signal Processing.

Temperature behavior of combination selection based mismatch calibration with 65 nm CMOS technology

Ari Paasio, Jonne Poikonen, Joona Marku, 2009, 2009 IEEE International SOC Conference (SOCC).

Accelerometer-Based Method for Extracting Respiratory and Cardiac Gating Information for Dual Gating during Nuclear Medicine Imaging

Ari Paasio, Tero Koivisto, Mikko Pänkäälä, 2014, Int. J. Biomed. Imaging.

Line Detection on FPGA with parallel sensor-level segmentation

Ari Paasio, Mika Laiho, Jonne Poikonen, 2014, 2014 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA).

Prototype rotation based assisted image analysis for 3D vision system

Ari Paasio, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

High speed cellular array computer realizations for low power applications

Kari Halonen, Ari Paasio, Mika Laiho, 2003, Proceedings of the International Joint Conference on Neural Networks, 2003..

A multiplier-free fixed-task digital CNN array for video segmentation system

Ari Paasio, J. Isoaho, J. Paakkulainen, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Structure of a CNN cell with linear and second order polynomial feedback terms

Kari Halonen, Ari Paasio, Mika Laiho, 2000, Proceedings of the 2000 6th IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA 2000) (Cat. No.00TH8509).

On the Spatial Distribution of Local Non-parametric Facial Shape Descriptors

Ari Paasio, Mika Laiho, Olli Lahdenoja, 2009, SCIA.

CMOS implementation of associative memory using cellular neural network having adjustable template coefficients

Kari Halonen, Ari Paasio, Veikko Porra, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

A new cell output nonlinearity for dense cellular nonlinear network integration

Kari Halonen, Ari Paasio, K. Halonen, 2001 .

A new algorithm for segmentation of cardiac quiescent phases and cardiac time intervals using seismocardiography

Ari Paasio, Timo Knuutila, Tero Koivisto, 2015, International Conference on Graphic and Image Processing.

MIPA4k: A 64×64 cell mixed-mode image processor array

Ari Paasio, Mika Laiho, Jonne Poikonen, 2009, 2009 IEEE International Symposium on Circuits and Systems.

High-Dynamic-Range Image Reconstruction from Pixel-Level Self-Reset ADC Samples

Ari Paasio, Mika Laiho, Mika Grönroos, 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

Compensation of errors generated by an analog 2D DCT

Ari Paasio, Kati Virtanen, N. Pankaala, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Pulse stream current mode CMOS CNN chip

Ari Paasio, A. Dawidziuk, Veikko Porra, 1996, 1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96).

Seam tracking with adaptive image capture for fine-tuning of a high power laser welding process

Ari Paasio, Tero Säntti, Mika Laiho, 2015, Other Conferences.

Very fast and compact fixed template CNN realizations for B/W processing

Kari Halonen, Ari Paasio, Asko Kananen, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

A massively parallel algorithm for local binary pattern based face recognition

Ari Paasio, Mika Laiho, Janne Maunu, 2006, 2006 IEEE International Symposium on Circuits and Systems.

An Analog Processor Array Implementing Interconnect-Efficient Reference Data Shift and SAD/SSD Extraction for Motion Estimation

Kari Halonen, Lauri Koskinen, Ari Paasio, 2009, EURASIP J. Adv. Signal Process..

Live demonstration: MIPA4k: A 64×64 cell mixed-mode image processor array

Ari Paasio, Mika Laiho, Jonne Poikonen, 2009, 2009 IEEE International Symposium on Circuits and Systems.

CNN template robustness with different output nonlinearities

Ari Paasio, Adam Dawidziuk, 1999, Int. J. Circuit Theory Appl..

Processor, a circuit and method for processing images in a parallel

Ari Paasio, 2000 .

Building blocks for large annealed compact neural networks

Kari Halonen, Ari Paasio, Mika Laiho, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Effect of mismatch on a ranked-order extractor array [image processing applications]

Ari Paasio, Jonne Poikonen, Olli Lahdenoja, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Sine wave as a correlating signal for UWB radio

Meigen Shen, Ari Paasio, Tero Koivisto, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Characterizing Spatters in Laser Welding of Thick Steel Using Motion Flow Analysis

Ari Paasio, Tero Säntti, Mika Laiho, 2013, SCIA.

Template Design for Cellular Nonlinear Networks With 1-Bit Weights

Ari Paasio, Mika Laiho, Jacek Flak, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

Current source calibration by combination selection of minimum sized devices

Ari Paasio, Mika Laiho, Janne Maunu, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Improved cell core for a mixed-mode polynomial CNN

Kari Halonen, Ari Paasio, Mika Laiho, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Design of the processing core of a mixed-signal CMOS DTCNN chip for pixel-level snakes

Victor M. Brea, Ari Paasio, Diego Cabello, 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

High density VLSI implementation of a bipolar CNN with reduced programmability

Kari Halonen, Ari Paasio, Mika Laiho, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Mixed-signal baseband processing chain for a MB-OFDM receiver

Ari Paasio, Mika Laiho, Kati Virtanen, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

Template design for binary-programmable cellular nonlinear networks

Kari Halonen, Ari Paasio, Mika Laiho, 2005, 2005 IEEE International Symposium on Circuits and Systems.

The power rectifying switch, its use and method in a parallel

Ari Paasio, Jonne Poikonen, 2002 .

A ranked order filter implementation for parallel analog processing

Ari Paasio, Jonne Poikonen, 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

Low-Power Regulator for Micro Energy Harvesting Applications

Victor M. Brea, Ari Paasio, Tapani Nevalainen, 2018, 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC).

A current-mode ADC with adaptive quantization

Ari Paasio, Kati Virtanen, Mikko Pänkäälä, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Cell and network level design of a mixed-mode CNN

Ari Paasio, Mika Laiho, A. Kananen, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Reducing the feature vector length in local binary pattern based face recognition

Ari Paasio, Mika Laiho, Olli Lahdenoja, 2005, IEEE International Conference on Image Processing 2005.

Motion estimation computational complexity reduction with CNN shape segmentation

Kari Halonen, Lauri Koskinen, Ari Paasio, 2005, IEEE Transactions on Circuits and Systems for Video Technology.

About the robustness of CNN linear templates with bipolar images

Kari Halonen, Ari Paasio, A. Dawidziuk, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Local memory and logic arrangement for ultra-low power array processors

Ari Paasio, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Rank identification for an analog ranked order filter

Ari Paasio, Jonne Poikonen, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Architecture for Analog Variable Block-Size Motion Estimation

Kari Halonen, Lauri Koskinen, Ari Paasio, 2007, 2007 IEEE International Conference on Image Processing.

N /spl times/ 16 cellular test chips for low-pass filtering large images

Kari Halonen, Ari Paasio, Mika Laiho, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Temperature compensation in combination selection based mismatch calibration

Ari Paasio, Jonne Poikonen, Joona Marku, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Implementation of cellular neural network operating with bipolar images

Ari Paasio, A. Dawidziuk, Veikko Porra, 1996, Proceedings of International Conference on Neural Networks (ICNN'96).

Different Approaches for Implementing Cellular Neural Networks with Adjustable Template Coefficients

Kari Halonen, Ari Paasio, Veikko Porra, 1994 .

A Differential Architecture for an Online Analog Viterbi Decoder

Ari Paasio, Mika Laiho, Janne Maunu, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

Different possibilities for realizing the bipolar image processing tasks in CNN field

Kari Halonen, Lauri Koskinen, Ari Paasio, 2001 .

Centroiding and classification of objects using a processor array with a scalable region of interest

Kari Halonen, Ari Paasio, Mika Laiho, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A 1.2V 10bit 83MSps pipeline ADC in 130nm CMOS

Ari Paasio, Jia Sun, Hao Meng, 2009, 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia).

A 176 x 144 processor binary I/O CNN-UM chip design

Ari Paasio, Veikko Porra, A. Kananen, 1999 .

CNN template robustness with different output nonlinearities

Ari Paasio, A. Paasio, Adam Dawidziuk, 1999, Int. J. Circuit Theory Appl..