Daniele Bortolotti

发表

An ultra-low power dual-mode ECG monitor for healthcare and wellness

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

PHIDIAS: ultra-low-power holistic design for smart bio-signals computing platforms

Luca Benini, Pierre Vandergheynst, Chris Van Hoof, 2016, Conf. Computing Frontiers.

User-space APIs for dynamic power management in many-core ARMv8 computing nodes

Andrea Bartolini, Daniele Bortolotti, Simone Tinti, 2016, 2016 International Conference on High Performance Computing & Simulation (HPCS).

An Ambient Temperature Variation Tolerance Scheme for an Ultra Low Power Shared-L1 Processor Cluster

Luca Benini, Andrea Bartolini, Daniele Bortolotti, 2013, 2013 Euromicro Conference on Digital System Design.

A variation tolerant architecture for ultra low power multi-processor cluster

Luca Benini, Andrea Bartolini, Davide Rossi, 2013, 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

VirtualSoC: A Full-System Simulation Environment for Massively Parallel Heterogeneous System-on-Chip

Luca Benini, Daniele Bortolotti, Andrea Marongiu, 2013, 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum.

Application of compressed sensing to ECG signals: Decoder-side benefits of the rakeness approach

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2016, 2016 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Energy-Aware Bio-signal Compressed Sensing Reconstruction: FOCUSS on the WBSN-Gateway

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2015, 2015 IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip.

A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing

Luca Benini, Andrea Bartolini, David Atienza, 2017, IEEE Transactions on Computers.

Quantifying the benefits of compressed sensing on a WBSN-based real-time biosignal monitor

Luca Benini, Andrea Bartolini, Elisabetta Farella, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Long-Term ECG monitoring with zeroing Compressed Sensing approach

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2015, 2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC).

An ultra-low power resilient multi-core architecture with static and dynamic tolerance to ambient temperature-induced variability

Luca Benini, Andrea Bartolini, Daniele Bortolotti, 2014, Microprocess. Microsystems.

Approximate Compressed Sensing: Ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor

Luca Benini, Pierre Vandergheynst, Andrea Bartolini, 2014, 2014 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

Parallel Architectures for Many-Core Systems-On-Chip in Deep Sub-Micron Technology

Daniele Bortolotti, Daniele Bortolotti, 2014 .

Energy Analysis of Decoders for Rakeness-Based Compressed Sensing of ECG Signals

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2017, IEEE Transactions on Biomedical Circuits and Systems.

Zeroing for HW-efficient compressed sensing architectures targeting data compression in wireless sensor networks

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2017, Microprocess. Microsystems.

VirtualSoC: A Research Tool for Modern MPSoCs

Luca Benini, Daniele Bortolotti, Andrea Marongiu, 2016, ACM Trans. Embed. Comput. Syst..

Rakeness-based compressed sensing on ultra-low power multi-core biomedicai processors

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2014, Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing.

Exploring instruction caching strategies for tightly-coupled shared-memory clusters

Luca Benini, Daniele Bortolotti, Andrea Marongiu, 2011, 2011 International Symposium on System on Chip (SoC).

Energy-Aware Bio-Signal Compressed Sensing Reconstruction on the WBSN-Gateway

Luca Benini, Andrea Bartolini, Riccardo Rovatti, 2018, IEEE Transactions on Emerging Topics in Computing.

Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs

Luca Benini, Davide Bertozzi, José L. Abellán, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors

Luca Benini, Andrea Bartolini, Davide Rossi, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).