Pierfrancesco Foglia

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2010, 2010 22nd International Symposium on Computer Architecture and High Performance Computing.

Hipeac Network of Excellence N. IST-004408 Deliverable D3.b - Report on Research Results. Cluster 442 - Adaptable Computers for Embedded Applications 2

Pierfrancesco Foglia, P. Foglia, 2008 .

Facing the False Miss Problem in D-NUCA based CMP Systems

Pierfrancesco Foglia, Cosimo Antonio Prete, Francesco Panicucci, 2008 .

Embedded processors and systems: Architectural issues and solutions for emerging applications

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2006, J. Embed. Comput..

CMP L2 NUCA Cache Energy Consumption Model

Pierfrancesco Foglia, Cosimo Antonio Prete, Francesco Panicucci, 2008 .

Hardware Architectures to Support real-time NURBS Interpolation

Alessandro Bardine, Stefano Campanelli, Pierfrancesco Foglia, 2010 .

ACM SIGARCH Computer Architecture news Special Issue: Proceedings of the MEDEA03 Workshop

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2004 .

Improving power efficiency of D-NUCA caches

Per Stenström, Alessandro Bardine, Pierfrancesco Foglia, 2007, CARN.

Coherence in the CMP ERA: Lesson Learned in Designing a LLC Architecture

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2014 .

A workload independent energy reduction strategy for D-NUCA caches

Pierfrancesco Foglia, Manuel Comparetti, 2013, The Journal of Supercomputing.

MEDEA '08: Proc. 2008 workshop on MEmory performance

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2008 .

Analyzing the Optimal Voltage/Frequency Pair in Fault-Tolerant Caches

Julio Sahuquillo, Salvador Petit, Pierfrancesco Foglia, 2014, 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS).

Row-level algorithm to improve real-time performance of glass tube defect detection in the production phase

Pierfrancesco Foglia, Cosimo Antonio Prete, Gabriele Antonio De Vitis, 2020, IET Image Process..

Assisting e-government users with animated talking faces

Pierfrancesco Foglia, Cosimo Antonio Prete, Michele Zanda, 2007, INTR.

A cache design for high performance embedded systems

Pierfrancesco Foglia, Cosimo Antonio Prete, Daniele Mangano, 2005, J. Embed. Comput..

Investigating Design Trade-Off in S-NUCA Based CMP Systems

Pierfrancesco Foglia, Cosimo Antonio Prete, Francesco Panicucci, 2009 .

Analysis of sharing overhead in shared memory multiprocessors

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 1998, Proceedings of the Thirty-First Hawaii International Conference on System Sciences.

Algorithms for the Detection of Blob Defects in High Speed Glass Tube Production Lines

Pierfrancesco Foglia, Cosimo Antonio Prete, Gabriele Antonio De Vitis, 2019, 2019 IEEE 8th International Workshop on Advances in Sensors and Interfaces (IWASI).

Impact of on-chip network parameters on nuca cache performances

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2009, IET Comput. Digit. Tech..

Simulation study of memory performance of SMP multiprocessors running a TPC-W workload

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2004 .

Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2005, J. Parallel Distributed Comput..

Evaluating Power Consumption of D-Nuca Caches

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2007 .

NAnoscale Molecular Dynamics (NAMD)

Holger Fröning, Robert Latham, Marat Valiev, 2011, Encyclopedia of Parallel Computing.

Tuning D-Nuca Cache

Pierfrancesco Foglia, Cosimo Antonio Prete, Daniele Mangano, 2005 .

Leveraging Data Promotion for Low Power D-NUCA Caches

Per Stenström, Alessandro Bardine, Pierfrancesco Foglia, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Reducing Sensitivity to NoC Latency in NUCA Caches

Pierfrancesco Foglia, Francesco Panicucci, Marco Solinas, 2009 .

High Performance Embedded Architectures and Compilers, 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings

Yale N. Patt, Pierfrancesco Foglia, Xavier Martorell, 2010, HiPEAC.

Integration of existing IEC 61131-3 systems in an IEC 61499 distributed solution

Stefano Campanelli, Pierfrancesco Foglia, Cosimo Antonio Prete, 2012, Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation (ETFA 2012).

An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload

Pierfrancesco Foglia, Cosimo Antonio Prete, Francesco Panicucci, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

ACA IP SARC project N. 27648 Deliverable D2.4 Report on SARC memory System design concepts

Per Stenström, Stefanos Kaxiras, Georgi Gaydadjiev, 2008 .

Accelerating DSS Workloads through Coherence Protocols

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2001 .

Analysis of static and dynamic energy consumption in NUCA caches: initial results

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2007, MEDEA '07.

ACA IP SARC project N. 27648 Deliverable D8.4 -Training and Dissemination Activities Report

Alessandro Bardine, Pierfrancesco Foglia, M. Zanda, 2008 .

Analysis of embedded video coder systems: a system-level approach

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2006, SIGARCH Comput. Archit. News.

A NUCA model for embedded systems cache design

Pierfrancesco Foglia, Cosimo Antonio Prete, Daniele Mangano, 2005, 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005..

MPEG video traffic on a MetaRing network: complexity reduction of a 'worst-case' model for bandwidth allocation analysis

Giuseppe Anastasi, Luciano Lenzini, Pierfrancesco Foglia, 1998, Comput. Commun..

Implementation Issues of Way Adaptable D-NUCA Caches

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2008 .

NUCA caches: Analysis of Performance Sensitivity to NOC Parameters

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2008 .

Re-NUCA: Boosting CMP Performance Through Block Replication

Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

OS Effects on Memory Hierarchy of a SMP Multiprocessor Running a DBMS Workload

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2001 .

Guests editor's introduction

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2005, SIGARCH Comput. Archit. News.

Eighth MEDEA Workshop

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2011, Trans. High Perform. Embed. Archit. Compil..

Speeding-up multiprocessors running DBMS workloads through coherence protocols

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2004, Int. J. High Perform. Comput. Netw..

Energy Behaviour of NUCA Caches in CMPs

Julio Sahuquillo, Alessandro Bardine, Pierfrancesco Foglia, 2011, 2011 14th Euromicro Conference on Digital System Design.

Modelling Public Administration Portals

Pierfrancesco Foglia, Cosimo Antonio Prete, Michele Zanda, 2007, Encyclopedia of Portal Technologies and Applications.

Exploiting replication to improve performances of NUCA-based CMP systems

Pierfrancesco Foglia, Marco Solinas, P. Foglia, 2014, ACM Trans. Embed. Comput. Syst..

CMP L2 NUCA Cache Power Consumption Reduction Technique

Pierfrancesco Foglia, Cosimo Antonio Prete, Francesco Panicucci, 2008 .

Use of a CORBA/RMI gateway: characterization of communication overhead

Pierfrancesco Foglia, Cosimo Antonio Prete, Alessio Bechini, 2002, WOSP '02.

Techniques for Reducing Power Consumption in CMP NUCA Caches

Pierfrancesco Foglia, Cosimo Antonio Prete, Francesco Panicucci, 2007 .

Dynamic Optimization Techniques for D-NUCA Caches

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2008 .

A real-time configurable NURBS interpolator with bounded acceleration, jerk and chord error

Alessandro Bardine, Stefano Campanelli, Pierfrancesco Foglia, 2012, Comput. Aided Des..

Evaluating optimizations for multiprocessors e-commerce server running TPC-W workload

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2001, Proceedings of the 34th Annual Hawaii International Conference on System Sciences.

Way Adaptable D-Nuca Cache

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2006 .

An architecture to integrate IEC 61131-3 systems in an IEC 61499 distributed solution

Stefano Campanelli, Pierfrancesco Foglia, Cosimo Antonio Prete, 2015, Comput. Ind..

MEmory performance: DEaling with applications, systems and architecture

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2007, CARN.

Fine-grain design space exploration for a cartographic SoC multiprocessor

Pierfrancesco Foglia, Cosimo Antonio Prete, Alessio Bechini, 2003, CARN.

Stock Price Forecasting Over Adaptive Timescale Using Supervised Learning and Receptive Fields

Gigliola Vaglini, Pierfrancesco Foglia, Cosimo Antonio Prete, 2018, MIKE.

An ESB implementation for airport environment

Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas, 2006 .

Analysis of Performance Dependencies in NUCA-Based CMP Systems

Pierfrancesco Foglia, Cosimo Antonio Prete, Francesco Panicucci, 2009, 2009 21st International Symposium on Computer Architecture and High Performance Computing.

ACA IP SARC project N. 27648 Deliverable D2.5 Report on Performance and Power Efficiency of the SARC Memory System

Per Stenström, Stefanos Kaxiras, Georgi Gaydadjiev, 2009 .

Message from IWEC Workshop Co-chairs

Laurence T. Yang, Tarek M. Taha, Lorenzo Verdoscia, 2006, ICPP Workshops.

NUMA Caches

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2011, Encyclopedia of Parallel Computing.

An algorithm for the Classification of Coherence Related Overhead in Shared-Bus Shared-Memory Multiprocessors

Pierfrancesco Foglia, P. Foglia, 2001 .

Special Issue: Proceedings of the MEDEA02 Workshop

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2003 .

Performance analysis of electronic commerce multiprocessor server

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2000, Proceedings of the 33rd Annual Hawaii International Conference on System Sciences.

A Technique to Reduce the Processing Time of Defect Detection in Glass Tubes

Pierfrancesco Foglia, Cosimo Antonio Prete, Gabriele Antonio De Vitis, 2019, Advances in Intelligent Systems and Computing.

Memory performance: dealing with applications, systems and architecture

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2006, SIGARCH Comput. Archit. News.

Way adaptable D-NUCA caches

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2010, Int. J. High Perform. Syst. Archit..

Exploring the relationship between architectures and management policies in the design of NUCA-based chip multicore systems

Pierfrancesco Foglia, Cosimo Antonio Prete, Sandro Bartolini, 2018, Future Gener. Comput. Syst..

Boosting the Performance of Three-Tier Web Servers Deploying SMP Architecture

Pierfrancesco Foglia, Cosimo Antonio Prete, Roberto Giorgi, 2002, NETWORKING Workshops.

Extension of Web Server Systems for E-Commerce: Incremental Crowding vs. Functional Doubling-Up

Pierfrancesco Foglia, Alessio Bechini, 2001 .

Performance Sensitivity of NUCA Caches to On-Chip Network Parameters

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, 2008, 2008 20th International Symposium on Computer Architecture and High Performance Computing.

Modelling Public Administration Portals: Requirements, Methodologies and Tools to improve the User Experience

Pierfrancesco Foglia, Cosimo Antonio Prete, M. Zanda, 2007 .

Fast Blob and Air Line Defects Detection for High Speed Glass Tube Production Lines

Pierfrancesco Foglia, Cosimo Antonio Prete, Gabriele Antonio De Vitis, 2021, J. Imaging.

A pre-processing technique to decrease inspection time in glass tube production lines

Pierfrancesco Foglia, Cosimo Antonio Prete, Gabriele Antonio De Vitis, 2021, IET Image Process..