B. Nowakowski

The Architecture of Communication Channel for Custom Computing Machine Node

R. Kapela, B. Nowakowski, A. Rybarczyk, 2007, 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.

A neural network - hardware implementation using FPGA

Andrzej Rybarczyk, B. Nowakowski, A. Rybarczyk, 2003 .

Testing environments for mixed signal chips based on PLD devices

Andrzej Handkiewicz, Jacek Pierzchlewski, B. Nowakowski, 2007 .

Potokowe obliczenia argumentu funkcji przejścia dla warstwy neuronów z wykorzystaniem FPGA

A. Rybarczyk, B. Nowakowski, 2003 .

CPLD Based Development Board for Mixed Signal Chip Testing

A. Handkiewicz, J. Pierzchlewski, B. Nowakowski, 2007, 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.