Lukás Sekanina

发表

Lukás Sekanina, L. Sekanina, 2007, GECCO '07.

A method for design of impulse bursts noise filters optimized for FPGA implementations

Lukás Sekanina, Zdenek Vasícek, Michal Bidlo, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Fitness Landscape Analysis and Image Filter Evolution Using Functional-Level CGP

Lukás Sekanina, Karel Slaný, L. Sekanina, 2007, EuroGP.

Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates

Lukás Sekanina, L. Sekanina, 2007, 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems.

Evolutionary Approximation of Software for Embedded Systems: Median Function

Lukás Sekanina, Zdenek Vasícek, Vojtech Mrazek, 2015, GECCO.

Transistor-Level Evolution of Digital Circuits Using a Special Circuit Simulator

Lukás Sekanina, Ludek Zaloudek, 2008, ICES.

FITTest BENCH06: A New Set of Benchmark Circuits Reflecting Testability Properties

Zdenek Kotásek, Lukás Sekanina, Tomas Pecenka, 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit

Lukás Sekanina, Zdenek Vasícek, Petr Hanácek, 2013, Inf. Technol. Control..

Testability Estimation Based on Controllability and Observability Parameters

Zdenek Kotásek, Lukás Sekanina, Josef Strnadel, 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).

Advanced Approach to Calibration of Traffic Microsimulation Models Using Travel Times

Lukás Sekanina, Pavol Korcek, Otto Fucík, 2013, J. Cell. Autom..

On analysis of fabricated polymorphic circuits

Lukás Sekanina, Richard Ruzicka, Václav Simek, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Detection of Norwegian Speed Limit Signs

Jim Tørresen, Lukás Sekanina, J. Tørresen, 2002, ESM.

Hardware Accelerators for Cartesian Genetic Programming

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2008, EuroGP.

Cooperative Coevolutionary Approximation in HOG-based Human Detection Embedded System

Lukás Sekanina, Michal Wiglasz, L. Sekanina, 2018, 2018 IEEE Symposium Series on Computational Intelligence (SSCI).

Towards compositional coevolution in evolutionary circuit design

Lukás Sekanina, Michaela Sikulová, Gergely Komjathy, 2014, 2014 IEEE International Conference on Evolvable Systems.

Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing

Eduardo de la Torre, Lukás Sekanina, Teresa Riesgo, 2013, IEEE Transactions on Computers.

Easily testable image operators: the class of circuits where evolution beats engineers

Lukás Sekanina, Richard Ruzicka, L. Sekanina, 2003, NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings..

An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA

Lukás Sekanina, Tomás Martínek, L. Sekanina, 2005, ICES.

Evolution of efficient real-time non-linear image filters for FPGAs

Lukás Sekanina, Zdenek Vasícek, Michal Bidlo, 2013, Soft Comput..

Evolved Computing Devices and the Implementation Problem

Lukás Sekanina, L. Sekanina, 2007, Minds and Machines.

Evolutionary circuit design in REPOMO - reconfigurable polymorphic module

Lukás Sekanina, Richard Ruzicka, 2006, Computational Intelligence.

Implementation of bio-inspired adaptive wavelet transforms in FPGAs. Modeling, validation and profiling of the algorithm

Rubén Salvador Perea, Lukás Sekanina, Teresa Riesgo Alcaide, 2010 .

A fast Reconfigurable 2D HW core architecture on FPGAs for evolvable Self-Adaptive Systems

Eduardo de la Torre, Lukás Sekanina, Teresa Riesgo, 2011, 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

Evolutionary Approach to Approximate Digital Circuits Design

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2015, IEEE Transactions on Evolutionary Computation.

On dependability of FPGA-based evolvable hardware systems that utilize virtual reconfigurable circuits

Lukás Sekanina, L. Sekanina, 2006, CF '06.

Extrinsic and Intrinsic Evolution of Multifunctional Combinational Modules

Lukás Sekanina, Tomás Martínek, Zbysek Gajda, 2006, 2006 IEEE International Conference on Evolutionary Computation.

Recognizing Speed Limit Sign Numbers by Evolvable Hardware

Jim Tørresen, Lukás Sekanina, Jorgen W. Bakke, 2004, PPSN.

Evolutionary Approximation of Edge Detection Circuits

Lukás Sekanina, Petr Dvoracek, 2016, EuroGP.

Image filter evolution on the Xilinx Zynq Platform

Lukás Sekanina, Roland Dobai, L. Sekanina, 2013, 2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013).

Evolution of Iterative Formulas Using Cartesian Genetic Programming

Lukás Sekanina, Milos Minarik, L. Sekanina, 2011, KES.

Acceleration of Evolutionary Image Filter Design Using Coevolution in Cartesian GP

Lukás Sekanina, Michaela Sikulová, 2012, PPSN.

Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling

Lukás Sekanina, Teresa Riesgo, Félix Moreno, 2012, Microprocess. Microsystems.

Functional Equivalence Checking for Evolution of Complex Digital Circuits

Lukás Sekanina, Zdenek Vasícek, 2015, Evolvable Hardware.

Theory and applications of evolvable embedded systems

Lukás Sekanina, Vladimír Drábek, L. Sekanina, 2004, Proceedings. 11th IEEE International Conference and Workshop on the Engineering of Computer-Based Systems, 2004..

Cartesian Genetic Programming as an Optimizer of Programs Evolved with Geometric Semantic Genetic Programming

Lukás Sekanina, Ondrej Koncal, 2019, EuroGP.

Multi-objective Evolution of Ultra-Fast General-Purpose Hash Functions

Lukás Sekanina, David Grochol, 2018, EuroGP.

Evolution of Impulse Bursts Noise Filters

Kyrre Glette, Jim Tørresen, Lukás Sekanina, 2009, 2009 NASA/ESA Conference on Adaptive Hardware and Systems.

Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures

Lukás Sekanina, Petr Mikusek, 2008, EvoWorkshops.

Image Processing and CGP

Wolfgang Banzhaf, Lukás Sekanina, Simon Harding, 2011, Cartesian Genetic Programming.

Evolving boolean functions for fast and efficient randomness testing

Vashek Matyas, Lukás Sekanina, Zdenek Vasícek, 2018, GECCO.

Design Space Exploration for Approximate Implementations of Arithmetic Data Path Primitives

Lukás Sekanina, Zdenek Vasícek, Vojtech Mrazek, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support

Eduardo de la Torre, Lukás Sekanina, Teresa Riesgo, 2011, 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

Intrinsic Evolution of Controllable Oscillators in FPTA-2

Lukás Sekanina, Ricardo Salem Zebulum, 2005, ICES.

Error Mitigation Using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches

Luis Entrena, Lukás Sekanina, Antonio Sanchez-Clemente, 2016, IEEE Transactions on Reliability.

Evolutionary Approximation of Complex Digital Circuits

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2015, GECCO.

Relation between fault tolerance and reconfiguration in cellular systems

Lukás Sekanina, Vladimír Drábek, 2000, Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646).

Evolutionary Design of Digital Circuits: Where Are Current Limits?

Lukás Sekanina, L. Sekanina, 2006, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06).

ADAC: Automated Design of Approximate Circuits

Lukás Sekanina, Zdenek Vasícek, Tomás Vojnar, 2018, CAV.

Evolutionary circuit design: Tutorial

Lukás Sekanina, L. Sekanina, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Towards Robust and Accurate Traffic Prediction Using Parallel Multiobjective Genetic Algorithms and Support Vector Regression

Lukás Sekanina, Jiri Petrlik, 2015, 2015 IEEE 18th International Conference on Intelligent Transportation Systems.

A scalable cellular automata based microscopic traffic simulation

Lukás Sekanina, Pavol Korcek, Otto Fucík, 2011, 2011 IEEE Intelligent Vehicles Symposium (IV).

From Implementations to a General Concept of Evolvable Machines

Lukás Sekanina, L. Sekanina, 2003, EuroGP.

Evolutionary approach to calibration of cellular automaton based traffic simulation models

Lukás Sekanina, Pavol Korcek, Otto Fucík, 2012, 2012 15th International IEEE Conference on Intelligent Transportation Systems.

ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining

Muhammad Shafique, Muhammad Abdullah Hanif, Lukás Sekanina, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Evolutionary design of hash function pairs for network filters

Lukás Sekanina, Jan Korenek, Roland Dobai, 2017, Appl. Soft Comput..

Evolvable Hardware System at Extreme Low Temperatures

Adrian Stoica, Lukás Sekanina, Didier Keymeulen, 2005, ICES.

Physical Demonstration of Polymorphic Self-Checking Circuits

Lukás Sekanina, Richard Ruzicka, Roman Prokop, 2008, 2008 14th IEEE International On-Line Testing Symposium.

Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit

Lukás Sekanina, Zdenek Vasícek, Ladislav Capka, 2008, 2008 NASA/ESA Conference on Adaptive Hardware and Systems.

Special session: How approximate computing impacts verification, test and reliability

Alberto Bosio, Stefano Di Carlo, Lukás Sekanina, 2018, 2018 IEEE 36th VLSI Test Symposium (VTS).

Two-step evolution of polymorphic circuits for image multi-filtering

Lukás Sekanina, Zdenek Vasícek, Vojtech Salajka, 2012, 2012 IEEE Congress on Evolutionary Computation.

Polymorphic FIR Filters with Backup Mode Enabling Power Savings

Lukás Sekanina, Richard Ruzicka, Zbysek Gajda, 2009, 2009 NASA/ESA Conference on Adaptive Hardware and Systems.

Evolutionary circuit design for fast FPGA-based classification of network application protocols

Lukás Sekanina, Jan Korenek, Vlastimil Kosar, 2016, Appl. Soft Comput..

Introduction to approximate computing: Embedded tutorial

Lukás Sekanina, 2016, 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Circuit Approximation Using Single- and Multi-objective Cartesian GP

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2015, EuroGP.

autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components

Muhammad Shafique, Muhammad Abdullah Hanif, Lukás Sekanina, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Principles and Applications of Polymorphic Circuits

Lukás Sekanina, 2015, Evolvable Hardware.

Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage

Zdenek Kotásek, Lukás Sekanina, Zbysek Gajda, 2006, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06).

Towards evolvable IP cores for FPGAs

Lukás Sekanina, L. Sekanina, 2003, NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings..

Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time

Lukás Sekanina, Jirí Simácek, Lukás Starecek, 2010, ICES.

On area minimization of complex combinational circuits using cartesian genetic programming

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2012, 2012 IEEE Congress on Evolutionary Computation.

Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap

Muhammad Shafique, Lukás Sekanina, Zdenek Vasícek, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Cartesian genetic programming as local optimizer of logic networks

Lukás Sekanina, Zdenek Vasícek, Ondrej Ptak, 2014, 2014 IEEE Congress on Evolutionary Computation (CEC).

Evolution of Polymorphic Self-checking Circuits

Lukás Sekanina, 2007, ICES.

Evaluation of a New Platform For Image Filter Evolution

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2007, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007).

On Evolutionary Approximation of Logic Circuits

Lukás Sekanina, Zdenek Vasícek, 2014, Computing with New Resources.

High Level Validation of an Optimization Algorithm for the Implementation of Adaptive Wavelet Transforms in FPGAs

Lukás Sekanina, Teresa Riesgo, Félix Moreno, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

Evolutionary approximation of gradient orientation module in HOG-based human detection system

Lukás Sekanina, Michal Wiglasz, L. Sekanina, 2017, 2017 IEEE Global Conference on Signal and Information Processing (GlobalSIP).

Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs

Lukás Sekanina, Jan Korenek, L. Sekanina, 2005, ICES.

REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware

Lukás Fujcik, Lukás Sekanina, Zdenek Vasícek, 2009, 2009 IEEE Workshop on Evolvable and Adaptive Hardware.

Reducing the Area on a Chip Using a Bank of Evolved Filters

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2007, ICES.

When does Cartesian genetic programming minimize the phenotype size implicitly?

Lukás Sekanina, Zbysek Gajda, 2010, GECCO '10.

Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems

Eduardo de la Torre, Lukás Sekanina, Teresa Riesgo, 2011, 2011 International Conference on Reconfigurable Computing and FPGAs.

Reducing the number of transistors in digital circuits using gate-level evolutionary design

Lukás Sekanina, Zbysek Gajda, L. Sekanina, 2007, GECCO '07.

Exploring the Search Space of Hardware / Software Embedded Systems by Means of GP

Lukás Sekanina, Milos Minarik, L. Sekanina, 2014, EuroGP.

Towards new applications of multi-function logic: Image multi-filtering

Lukás Sekanina, Vojtech Salajka, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Cellular automata-based systems with fault-tolerance

Lukás Sekanina, Ludek Zaloudek, 2012, Natural Computing.

Behavior of CMOS polymorphic circuits in high temperature environment

Lukás Sekanina, Richard Ruzicka, Václav Simek, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Evolutionary design of complex approximate combinational circuits

Lukás Sekanina, Zdenek Vasícek, 2015, Genetic Programming and Evolvable Machines.

An Efficient Selection Strategy for Digital Circuit Evolution

Lukás Sekanina, Zbysek Gajda, 2010, ICES.

Adaptive development of hash functions in FPGA-based network routers

Lukás Sekanina, Jan Korenek, Roland Dobai, 2016, 2016 IEEE Symposium Series on Computational Intelligence (SSCI).

Evolutionary design of secrecy amplification protocols for wireless sensor networks

Petr Svenda, Lukás Sekanina, Václav Matyás, 2009, WiSec '09.

On logic synthesis of conventionally hard to synthesize circuits using genetic programming

Lukás Sekanina, Zdenek Vasícek, Jan Schmidt, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished

Lukás Sekanina, Zdenek Vasícek, Tomás Vojnar, 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

On Evolutionary Approximation of Sigmoid Function for HW/SW Embedded Systems

Lukás Sekanina, Milos Minarik, L. Sekanina, 2017, EuroGP.

Ubiquity symposium: Evolutionary computation and the processes of life: evolutionary computation in physical world

Lukás Sekanina, L. Sekanina, 2013, UBIQ.

Novel Logic Circuits Controlled by Vdd

Zdenek Kotásek, Lukás Sekanina, Lukás Starecek, 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

A SAT-based fitness function for evolutionary optimization of polymorphic circuits

Lukás Sekanina, Zdenek Vasícek, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems

Lukás Sekanina, Teresa Riesgo, Félix Moreno, 2010, 2010 NASA/ESA Conference on Adaptive Hardware and Systems.

This is an author-created accepted version of the paper: Vasicek Z., Sekanina L.: Formal Verification of Candidate Solutions for Post- Synthesis Evolutionary Optimization in Evolvable Hardware. Genetic Programming and Evolvable Machines, Spec. Issue on Evolvable Hardware

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2011 .

On Evolutionary Synthesis of Linear Transforms in FPGA

Lukás Sekanina, Zdenek Vasícek, Martin Zádník, 2008, ICES.

Low-Level Flexible Architecture with Hybrid Reconfiguration for Evolvable Hardware

Lukás Sekanina, Roland Dobai, L. Sekanina, 2015, ACM Trans. Reconfigurable Technol. Syst..

pecial CAI Section Devoted to MEMICS '11: Preface

Jan Bouda, Ivana Cerná, Zdenek Kotásek, 2012, Comput. Informatics.

Coevolution in Cartesian Genetic Programming

Lukás Sekanina, Michaela Sikulová, 2012, EuroGP.

On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits

Lukás Sekanina, Zbysek Gajda, L. Sekanina, 2011, J. Multiple Valued Log. Soft Comput..

Evolutionary Design of Fast High-quality Hash Functions for Network Applications

Lukás Sekanina, David Grochol, L. Sekanina, 2016, GECCO.

Towards highly optimized cartesian genetic programming: from sequential via SIMD and thread to massive parallel implementation

Lukás Sekanina, Radek Hrbacek, L. Sekanina, 2014, GECCO.

Modular framework for detection of inter-ictal spikes in iEEG

Milan Brazdil, Lukás Sekanina, Filip Kesner, 2017, 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

Evolutionary functional recovery in virtual reconfigurable circuits

Lukás Sekanina, L. Sekanina, 2007, JETC.

Adaptive and Evolvable Hardware and Systems: The State of the Art and the Prospectus for Future Development

Adrian Stoica, Lukás Sekanina, Mircea Gh. Negoita, 2008, KES.

Evolving Constructors for Infinitely Growing Sorting Networks and Medians

Lukás Sekanina, L. Sekanina, 2004, SOFSEM.

Evolving component library for approximate high level synthesis

Lukás Sekanina, Filip Vaverka, Radek Hrbacek, 2016, 2016 IEEE Symposium Series on Computational Intelligence (SSCI).

Multiobjective selection of input sensors for travel times forecasting using support vector regression

Lukás Sekanina, Jiri Petrlik, Otto Fucík, 2014, 2014 IEEE Symposium on Computational Intelligence in Vehicles and Transportation Systems (CIVTS).

Evolutionary design of approximate multipliers under different error metrics

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Concurrent evolution of hardware and software for application-specific microprogrammed systems

Lukás Sekanina, Milos Minarik, L. Sekanina, 2013, 2013 IEEE International Conference on Evolvable Systems (ICES).

Evolutionary discovering of the concept of the discrete state at the transistor level

Lukás Sekanina, Ricardo Salem Zebulum, R. Zebulum, 2005, 2005 NASA/DoD Conference on Evolvable Hardware (EH'05).

Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming

Lukás Sekanina, Zbysek Gajda, L. Sekanina, 2009, 2009 IEEE Congress on Evolutionary Computation.

Indirectly Encoded Fitness Predictors Coevolved with Cartesian Programs

Lukás Sekanina, Michaela Sikulová, Jiri Hulva, 2015, EuroGP.

Evolution of Electronic Circuits

Marco Platzner, Paul Kaufmann, Lukás Sekanina, 2011, Cartesian Genetic Programming.

Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration

Zdenek Kotásek, Lukás Sekanina, Lukás Starecek, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

Evolutionary Design Space Exploration for Median Circuits

Lukás Sekanina, L. Sekanina, 2004, EvoWorkshops.

Implementation techniques for evolvable HW systems: virtual VS. dynamic reconfiguration

Eduardo de la Torre, Lukás Sekanina, Teresa Riesgo, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

Approximate circuit design by means of evolvable hardware

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2013, 2013 IEEE International Conference on Evolvable Systems (ICES).

On Some Directions in Security-Oriented Research

Jan Cernocký, Lukás Sekanina, Tomás Vojnar, 2007, 2007 ECSIS Symposium on Bio-inspired, Learning, and Intelligent Systems for Security (BLISS 2007).

Evolvable Hardware

Lukás Sekanina, L. Sekanina, 2009, Handbook of Natural Computing.

Toward Uniform Approach to Design of Evolvable Hardware Based Systems

Lukás Sekanina, Azeddien M. Sllame, A. M. Sllame, 2000, FPL.

Increasing Fault-Tolerance in Cellular Automata-Based Systems

Lukás Sekanina, Ludek Zaloudek, 2011, UC.

Automatic discovery of RTL benchmark circuits with predefined testability properties

Zdenek Kotásek, Lukás Sekanina, Josef Strnadel, 2005, 2005 NASA/DoD Conference on Evolvable Hardware (EH'05).

A global postsynthesis optimization method for combinational circuits

Lukás Sekanina, Zdenek Vasícek, 2011, 2011 Design, Automation & Test in Europe.

On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2006, EvoWorkshops.

Estimation of missing values in traffic density maps

Lukás Sekanina, Jiri Petrlik, Pavol Korcek, 2012, 2012 15th International IEEE Conference on Intelligent Transportation Systems.

Evolutionary functional approximation of circuits implemented into FPGAs

Lukás Sekanina, Zdenek Vasícek, Vojtech Mrazek, 2016, 2016 IEEE Symposium Series on Computational Intelligence (SSCI).

Polymorphic Gates in Design and Test of Digital Circuits

Zdenek Kotásek, Lukás Sekanina, Zbysek Gajda, 2008, Int. J. Unconv. Comput..

Towards low power approximate DCT architecture for HEVC standard

Lukás Sekanina, Zdenek Vasícek, Vojtech Mrazek, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

Evolution of digital circuits

Lukás Sekanina, L. Sekanina, 2011, GECCO.

Evolutionary digital circuit design with fast candidate solution establishment in field programmable gate arrays

Kyrre Glette, Jim Tørresen, Lukás Sekanina, 2014, 2014 IEEE International Conference on Evolvable Systems.

How to evolve complex combinational circuits from scratch?

Lukás Sekanina, Zdenek Vasícek, 2014, 2014 IEEE International Conference on Evolvable Systems.

Evolutionary Design of Arbitrarily Large Sorting Networks Using Development

Lukás Sekanina, Michal Bidlo, L. Sekanina, 2005, Genetic Programming and Evolvable Machines.

A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP

Lukás Sekanina, Jan Korenek, Martin Zádník, 2015, EvoApplications.

Multi-objective evolution of hash functions for high speed networks

Lukás Sekanina, David Grochol, 2017, 2017 IEEE Congress on Evolutionary Computation (CEC).

Automated Circuit Approximation Method Driven by Data Distribution

Lukás Sekanina, Zdenek Vasícek, Vojtech Mrazek, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Multiobjective evolution of approximate multiple constant multipliers

Lukás Sekanina, Jiri Petrlik, 2013, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Calibration of Traffic Simulation Models Using Vehicle Travel Times

Lukás Sekanina, Pavol Korcek, Otto Fucík, 2012, ACRI.

Evolutionary Design of Gate-Level Polymorphic Digital Circuits

Lukás Sekanina, L. Sekanina, 2005, EvoWorkshops.

Evolutionary design of efficient and robust switching image filters

Kyrre Glette, Lukás Sekanina, Zdenek Vasícek, 2011, 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

Evolution of synthetic RTL benchmark circuits with predefined testability

Zdenek Kotásek, Lukás Sekanina, Tomas Pecenka, 2008, TODE.

Design of power-efficient approximate multipliers for approximate artificial neural networks

Kaushik Roy, Lukás Sekanina, Zdenek Vasícek, 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems

Lukás Sekanina, Teresa Riesgo, Félix Moreno, 2011, EURASIP J. Adv. Signal Process..

An Evolvable Combinational Unit for FPGAs

Lukás Sekanina, Stepan Friedl, L. Sekanina, 2004, Comput. Artif. Intell..

Novel Hardware Implementation of Adaptive Median Filters

Lukás Sekanina, Zdenek Vasícek, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware

Lukás Sekanina, 2003, ICES.

Image Filter Design with Evolvable Hardware

Lukás Sekanina, L. Sekanina, 2002, EvoWorkshops.

Evolutionary Design of Message Efficient Secrecy Amplification Protocols

Vashek Matyas, Petr Svenda, Lukás Sekanina, 2012, EuroGP.

Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment

Lukás Sekanina, Zdenek Vasícek, Vojtech Mrazek, 2018, 2018 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

Visualisation and Analysis of Genetic Records Produced by Cartesian Genetic Programming

Lukás Sekanina, Vlastimil Kapusta, 2016, GECCO.

Providing information from the environment for growing electronic circuits through polymorphic gates

Lukás Sekanina, Michal Bidlo, L. Sekanina, 2005, GECCO '05.

Towards evolvable systems based on the Xilinx Zynq platform

Lukás Sekanina, Roland Dobai, L. Sekanina, 2013, 2013 IEEE International Conference on Evolvable Systems (ICES).

An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs

Lukás Sekanina, Zdenek Vasícek, L. Sekanina, 2007, 2007 International Conference on Field Programmable Logic and Applications.

EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods

Lukás Sekanina, Zdenek Vasícek, Vojtech Mrazek, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

On routine implementation of virtual evolvable devices using COMBO6

Lukás Sekanina, Stepan Friedl, L. Sekanina, 2004, Proceedings. 2004 NASA/DoD Conference on Evolvable Hardware, 2004..

Global Control in Polymorphic Cellular Automata

Lukás Sekanina, Tomas Komenda, L. Sekanina, 2011, J. Cell. Autom..

Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs

Lukás Sekanina, David Grochol, 2018, 2018 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

Search-based synthesis of approximate circuits implemented into FPGAs

Lukás Sekanina, Zdenek Vasícek, 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

Evolvable Hardware

Lukás Sekanina, 2012, Handbook of Natural Computing.

Editorial: Special issue on Advancing on Approximate Computing: Methodologies, Architectures and Algorithms

Alberto Bosio, Lukás Sekanina, Claus Braun, 2021, Future Gener. Comput. Syst..