A. C. Rajeev

Testing Model-Processing Tools for Embedded Systems

Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, 2007, 13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07).

Formal methods-use timing-analysis

A. C. Rajeev, Devesh B. Chokshi, Manoj G. Dixit, 2011 .

Scalable model-checking for precise end-to-end latency computation

A. C. Rajeev, S. Ramesh, Devesh B. Chokshi, 2013, 2013 IEEE Conference on Computer Aided Control System Design (CACSD).

Translation validation for stateflow to C

Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

CoGenTe: a tool for code generator testing

Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, 2010, ASE '10.

Verifying timing synchronization constraints in distributed embedded architectures

A. C. Rajeev, S. Ramesh, Swarup Mohalik, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Design Verification of Automotive Controller Models

A. C. Rajeev, Swarup Mohalik, S. Ramesh, 2013 .

Schedulability and end-to-end latency in distributed ECU networks: formal modeling and precise estimation

A. C. Rajeev, S. Ramesh, Devesh B. Chokshi, 2010, EMSOFT '10.

Behaviour Directed Testing of Auto-code Generators

Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, 2008, 2008 Sixth IEEE International Conference on Software Engineering and Formal Methods.

How to Test Program Generators? A Case Study using flex

Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, 2007, Fifth IEEE International Conference on Software Engineering and Formal Methods (SEFM 2007).

Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts

Shengbing Jiang, A. C. Rajeev, S. Ramesh, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Applying Design Verification Tools in Automotive Software V&V

A. C. Rajeev, Anand Yeolekar, Arun Chakrapani Rao, 2011 .