Ilker Hamzaoglu

发表

A computation and energy reduction technique for HEVC Discrete Cosine Transform

Ilker Hamzaoglu, Ahmet Can Mert, Ercan Kalali, 2016, IEEE Transactions on Consumer Electronics.

A high performance and low energy hardware for intra prediction with Template Matching

Ilker Hamzaoglu, Yusuf Adibelli, Ilker Hamzaoglu, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

Computation and power reduction techniques for H.264 intra prediction

Ilker Hamzaoglu, Mustafa Parlak, Yusuf Adibelli, 2012, Microprocess. Microsystems.

A novel energy reduction technique for H.264 intra mode decision

Ilker Hamzaoglu, Mustafa Parlak, Yusuf Adibelli, 2011, 2011 18th IEEE International Conference on Image Processing.

Energy reduction techniques for H.264 deblocking filter hardware

Ilker Hamzaoglu, Mustafa Parlak, Yusuf Adibelli, 2011, IEEE Transactions on Consumer Electronics.

A Computation and Power Reduction Technique for H.264 Intra Prediction

Ilker Hamzaoglu, Mustafa Parlak, Yusuf Adibelli, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

Ilker Hamzaoglu, Mustafa Parlak, Yusuf Adibelli, 2010, 2010 International Conference on Field Programmable Logic and Applications.

Computation Reduction Techniques for Vector Median Filtering and their Hardware Implementation

Ilker Hamzaoglu, Ozgur Tasdizen, Ilker Hamzaoglu, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion

Mert Cetin, Ilker Hamzaoglu, Cagla Cakir, 2011, 2011 14th Euromicro Conference on Digital System Design.

An Adaptive True Motion Estimation Algorithm for Frame Rate Conversion of High Definition Video

Mert Cetin, Ilker Hamzaoglu, Ilker Hamzaoglu, 2010, 2010 20th International Conference on Pattern Recognition.

A reconfigurable H.264 video encoder hardware

Ilker Hamzaoglu, Aydin Aysu, Onur Can Ulusel, 2011, 2011 IEEE 19th Signal Processing and Communications Applications Conference (SIU).

Efficient Hardware Implementations of Low Bit Depth Motion Estimation Algorithms

Sarp Ertürk, Ilker Hamzaoglu, Oguzhan Urhan, 2009, IEEE Signal Processing Letters.

New Techniques for Deterministic Test Pattern Generation

Janak H. Patel, Ilker Hamzaoglu, J. Patel, 1998, Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231).

Test set compaction algorithms for combinational circuits

Janak H. Patel, Ilker Hamzaoglu, J. Patel, 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

High performance 2D transform hardware for future video coding

Ilker Hamzaoglu, Ahmet Can Mert, Ercan Kalali, 2017, IEEE Transactions on Consumer Electronics.

A low power multi-rate decoder hardware for IEEE 802.11n LDPC codes

Ilker Hamzaoglu, Mehmet Keskinoz, Merve Peyic, 2012, Microprocess. Microsystems.

Low Power IEEE 802.11n LDPC Decoder Hardware

Ilker Hamzaoglu, Mehmet Keskinoz, Merve Peyic, 2008 .

Efficient Multiple Constant Multiplication Using DSP Blocks in FPGA

Ilker Hamzaoglu, Ahmet Can Mert, Ercan Kalali, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

Low Error Efficient Approximate Adders for FPGAs

Ilker Hamzaoglu, Berke Ayrancioglu, Waqar Ahmad, 2021, IEEE Access.

Test Pattern Generation and Test Application Time Reduction Algorithms for VLSI Circuits

Janak H. Patel, Ilker Hamzaoglu, Ilker Hamzaoglu, 1999 .

Reducing test application time for full scan embedded cores

Janak H. Patel, Ilker Hamzaoglu, J. Patel, 1999, Digest of Papers. Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing (Cat. No.99CB36352).