M. H. Haghbayan

发表

Approximation knob: Power Capping meets energy efficiency

Axel Jantsch, Hannu Tenhunen, Nikil D. Dutt, 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Dark silicon aware runtime mapping for many-core systems: A patterning approach

Axel Jantsch, Hannu Tenhunen, Pasi Liljeberg, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Towards Real-Time Edge Detection for Event Cameras Based on Lifetime and Dynamic Slicing

Hannu Tenhunen, Jukka Heikkonen, Juha Plosila, 2020, AICV.

Test Generation and Scheduling for a Hybrid BIST Considering Test Time and Power Constraint pdf

Mahmood Fathy, M. H. Haghbayan, Zainalabedin Navabi, 2017, ArXiv.

Approximation for Run-time Power Management

Pasi Liljeberg, Anil Kanduri, M. H. Haghbayan, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Generating test patterns for sequential circuits using random patterns by PLI functions

M. H. Haghbayan, Zainalabedin Navabi, Ramyar Saeedi, 2010, 2010 East-West Design & Test Symposium (EWDTS).

Dark silicon aware power management for manycore systems under dynamic workloads

Axel Jantsch, Hannu Tenhunen, Pasi Liljeberg, 2014, 2014 IEEE 32nd International Conference on Computer Design (ICCD).

Graph based fault model definition for bus testing

M. H. Haghbayan, Mahmoud Tabandeh, Adele Maleki, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

Online Test Macro Scheduling and Assignment in MPSoC Design

M. H. Haghbayan, Zainalabedin Navabi, Seyyed Alireza Hoseini, 2011, 2011 Asian Test Symposium.

Thermal-Cycling-aware Dynamic Reliability Management in Many-Core System-on-Chip

Hannu Tenhunen, Juha Plosila, M. H. Haghbayan, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST

M. H. Haghbayan, Zainalabedin Navabi, Saeed Safari, 2012, 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

A Power-Aware Approach for Online Test Scheduling in Many-Core Architectures

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2016, IEEE Transactions on Computers.

A lifetime-aware runtime mapping approach for many-core systems in the dark silicon era

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Automated formal approach for debugging dividers using dynamic specification

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Power-aware online testing of manycore systems in the dark silicon era

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Functional fault model definition for bus testing

M. H. Haghbayan, Mahmoud Tabandeh, Adele Maleki, 2013, East-West Design & Test Symposium (EWDTS 2013).

Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach

Axel Jantsch, Hannu Tenhunen, Pasi Liljeberg, 2015, 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

Test data compression strategy while using hybrid-BIST methodology

M. H. Haghbayan, M. Tabandeh, E. Karimi, 2013, East-West Design & Test Symposium (EWDTS 2013).

An Efficient Multi-sensor Fusion Approach for Object Detection in Maritime Environments

Jukka Heikkonen, Juha Plosila, M. H. Haghbayan, 2018, 2018 21st International Conference on Intelligent Transportation Systems (ITSC).

MapPro: Proactive Runtime Mapping for Dynamic Workloads by Quantifying Ripple Effect of Applications on Networks-on-Chip

Axel Jantsch, Hannu Tenhunen, Pasi Liljeberg, 2015, NOCS.

Formal Verification and Debugging of Array Dividers with Auto-correction Mechanism

M. H. Haghbayan, Payman Behnam, Saeed Safari, 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.

Performance/Reliability-Aware Resource Management for Many-Cores in Dark Silicon Era

Hannu Tenhunen, Pasi Liljeberg, M. H. Haghbayan, 2017, IEEE Transactions on Computers.

High-level test program generation strategies for processors

M. H. Haghbayan, Shima Hoseinzadeh, 2013, East-West Design & Test Symposium (EWDTS 2013).

Object Detection Based on Multi-sensor Proposal Fusion in Maritime Environment

Jukka Heikkonen, M. H. Haghbayan, Fahimeh Farahnakian, 2018, 2018 17th IEEE International Conference on Machine Learning and Applications (ICMLA).

A dynamic specification to automatically debug and correct various divider circuits

M. H. Haghbayan, Bijan Alizadeh, 2016, Integr..

A mathematical model for estimating acceptable ratio of test patterns

M. H. Haghbayan, Behjat Forouzandeh, Paniz Foroutan, 2014, Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014).

Online testing of many-core systems in the Dark Silicon era

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Adaptive fault simulation on many-core microprocessor systems

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2015, 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Architecture design and technical methodology for bus testing

M. H. Haghbayan, Zainalabedin Navabi, 2010, 2010 East-West Design & Test Symposium (EWDTS).

Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2015, 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Energy-efficient concurrent testing approach for many-core systems in the dark silicon age

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Test Pattern Selection and Compaction for Sequential Circuits in an HDL Environment

M. H. Haghbayan, Zainalabedin Navabi, Fatemeh Javaheri, 2010, 2010 19th IEEE Asian Test Symposium.

Accelerated On-chip Communication Test Methodology Using a Novel High-Level Fault Model

Pasi Liljeberg, Amir-Mohammad Rahmani, M. H. Haghbayan, 2015, 2015 IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip.

MCX ? An Open-Source Framework For Digital Twins

Juha Plosila, Mohammed Rabah, M. H. Haghbayan, 2021, ECMS.

Energy-Efficient Navigation of an Autonomous Swarm with Adaptive Consciousness

Juha Plosila, M. H. Haghbayan, Jawad Naveed Yasin, 2021, Remote. Sens..

Hierarchical Fault Simulation of Deep Neural Networks on Multi-Core Systems

Hannu Tenhunen, Juha Plosila, M. H. Haghbayan, 2021, 2021 IEEE European Test Symposium (ETS).

High-Performance Parallel Fault Simulation for Multi-Core Systems

Hannu Tenhunen, Juha Plosila, M. H. Haghbayan, 2021, 2021 29th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP).