Seong-Ook Jung

发表

Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM

Hanwool Jeong, Taewon Kim, Taejoong Song, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 0.67nJ/S time-domain temperature sensor for low power on-chip thermal management

Seong-Ook Jung, Young-Jae An, Kyungho Ryu, 2013, 2013 IEEE International Conference on Consumer Electronics (ICCE).

Comparative Study of Various Latch-Type Sense Amplifiers

Hanwool Jeong, Seong-Ook Jung, Seung-Han Woo, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

ADDLL for Clock-Deskew Buffer in High-Performance SoCs

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rate

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2013, 2013 Proceedings of the ESSCIRC (ESSCIRC).

magnetoresistive memory transfer pair esp? n random access and design procedures.

Seong-Ook Jung, Seung H. Kang, Mehdi Hamidi Sani, 2008 .

Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM

Hanwool Jeong, Taewon Kim, Taejoong Song, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Area- and Energy-Efficient STDP Learning Algorithm for Spiking Neural Network SoC

Seong-Ook Jung, Giseok Kim, Kiryong Kim, 2020, IEEE Access.

Current Measurement Transducer Based on Current-To-Voltage-To-Frequency Converting Ring Oscillator with Cascade Bias Circuit

Seong-Ook Jung, Jongha Park, Jung-Hyun Park, 2020, Sensors.

Thermoelectric Cooling Read for Resolving Read Disturb With Inrush Current Issue in OTS-PRAM

Seong-Ook Jung, Hyun Kook Park, Tae Hoon Choi, 2019, IEEE Transactions on Nanotechnology.

Data-Cell-Variation-Tolerant Dual-Mode Sensing Scheme for Deep Submicrometer STT-RAM

Seong-Ook Jung, Seung H. Kang, Taehui Na, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

Transistor sizing for reliable domino logic design in dual threshold voltage technologies

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2001, GLSVLSI '01.

SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Decoder for Short BCH Codes With High Decoding Efficiency and Low Power for Emerging Memories

Seong-Ook Jung, Seung H. Kang, Jung Pill Kim, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Process-Variation-Calibrated Multiphase Delay Locked Loop With a Loop-Embedded Duty Cycle Corrector

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM

Dong-Hoon Jung, Seong-Ook Jung, Young-Jae An, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

All-Digital ON-Chip Process Sensor Using Ratioed Inverter-Based Ring Oscillator

Seong-Ook Jung, Young-Jae An, Kyungho Ryu, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Variation Analysis of DC Characteristics for Multi-Finger MOSFETs

Seong-Ook Jung, Ilgu Yun, Chulhyun Park, 2008 .

CNN Acceleration With Hardware-Efficient Dataflow for Super-Resolution

Seong-Ook Jung, Hong Keun Ahn, Sumin Lee, 2020, IEEE Access.

Skew-tolerant high-speed (STHS) domino logic

Sung-Mo Kang, Seong-Ook Jung, Seung-Moon Yoo, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Multiple-Cell Reference Scheme for Narrow Reference Resistance Distribution in Deep Submicrometer STT-RAM

Seong-Ook Jung, Taehui Na, Jung Pill Kim, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

MTJ based non-volatile flip-flop in deep submicron technology

Seong-Ook Jung, Kyungho Ryu, Jisu Kim, 2011, 2011 International SoC Design Conference.

Low-swing clock domino logic incorporating dual supply and dual threshold voltages

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2002, DAC '02.

Area-optimal sensing circuit designs in deep submicrometer STT-RAM

Seong-Ook Jung, Taehui Na, Jung Pill Kim, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Comparative analysis of 1:1:2 and 1:2:2 FinFET SRAM bit-cell using assist circuit

Hanwool Jeong, Seong-Ook Jung, Junha Lee, 2013, 2013 International SoC Design Conference (ISOCC).

Low search power and high reliability 13T-4R MTJ based nonvolatile ternary content-addressable memory

Seong-Ook Jung, Byungkyu Song, Hyun-Kook Park, 2018, 2018 International Conference on Electronics, Information, and Communication (ICEIC).

0.293-mm2 Fast Transient Response Hysteretic Quasi- $V^{2}$ DC–DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35- $\mu$ m CMOS

Dong-Hoon Jung, Seong-Ook Jung, Sunghwan Joo, 2018, IEEE Journal of Solid-State Circuits.

Source follower based single ended sense amplifier for large capacity SRAM

Dong-Hoon Jung, Hanwool Jeong, Taejoong Song, 2013, 2013 International SoC Design Conference (ISOCC).

Modular charge recycling pass transistor logic (MCRPL)

Sung-Mo Kang, Seong-Ook Jung, 2000 .

Sensing circuit optimization using different type of transistors for deep submicron STT-RAM

Seong-Ook Jung, Seung H. Kang, Jisu Kim, 2013, 2013 International SoC Design Conference (ISOCC).

Parasitic $RC$ Aware Delay Corner Model for Sub-10-nm Logic Circuit Design

Seong-Ook Jung, Tae Hoon Choi, Tae Woo Oh, 2019, IEEE Transactions on Electron Devices.

One-Sided Static Noise Margin and Gaussian-Tail-Fitting Method for SRAM

Hanwool Jeong, Seong-Ook Jung, Junha Lee, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS

Seong-Ook Jung, Seung H. Kang, Taehui Na, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Combined integrated memory and logic circuit and operating method therefor

Seong-Ook Jung, Min-hwa Jang, 1998 .

A dual-edge triggered phase detector for fast-lock DLL

Seong-Ook Jung, Sang Kyu Park, Kyung Ho Ryu, 2008 .

Corner-Aware Dynamic Gate Voltage Scheme to Achieve High Read Yield in STT-RAM

Seong-Ook Jung, Jisu Kim, Taehui Na, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Slope Interconnect Effort: Gate-Interconnect Interdependent Delay Modeling for Early CMOS Circuit Simulation

Kaushik Roy, Seong-Ook Jung, Myeong-Eun Hwang, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

Slope Interconnect Effort: Gate-Interconnect Interdependent Delay Model for CMOS Logic Gates with Scaled Supply Voltage

Seong-Ook Jung, Kaushik Roy, Myeong-Eun Hwang, 2007 .

A Magnetic Tunnel Junction Based Zero Standby Leakage Current Retention Flip-Flop

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Evaluation of STT-MRAM L3 cache in 7nm FinFET process

Seong-Ook Jung, Sara Choi, Hong Keun Ahn, 2018, 2018 International Conference on Electronics, Information, and Communication (ICEIC).

Process Variation Tolerant All-Digital 90$^{\circ}$ Phase Shift DLL for DDR3 Interface

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Noise-aware power optimization for on-chip interconnect

Sung-Mo Kang, Seong-Ook Jung, C. L. Liu, 2000, ISLPED '00.

An Offset-Canceling Triple-Stage Sensing Circuit for Deep Submicrometer STT-RAM

Seong-Ook Jung, Seung H. Kang, Jisu Kim, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Process variation tolerant all-digital multiphase DLL for DDR3 interface

Seong-Ook Jung, Kyungho Ryu, Donghwan Lee, 2010, IEEE Custom Integrated Circuits Conference 2010.

Transient Cell Supply Voltage Collapse Write Assist Using Charge Redistribution

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Novel Both-Sided Bitline Driving Technique for Low Latency in High Capacity NAND Flash

Seong-Ook Jung, Tae Woo Oh, Jun Ho An, 2020, 2020 35th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC).

Dual threshold voltage domino logic synthesis for high performance with noise and power constraint

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

STT-MRAM Sensing: A Review

Seong-Ook Jung, Seung H. Kang, Taehui Na, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory

Hanwool Jeong, Seong-Ook Jung, Jisu Kim, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Race-Free Mixed Serial-Parallel Comparison for Low Power Content Addressable Memory

Seong-Ook Jung, Sei-Seung Yoon, 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Statistical modeling of layout-dependent characteristic fluctuations for multi-finger MOSFETs

Seong-Ook Jung, Chulhyun Park, Junghan Kang, 2008, 2008 IEEE International Conference on Electron Devices and Solid-State Circuits.

Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology

Seong-Ook Jung, Juhyun Park, Joseph Wang, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic

Sung-Mo Kang, Seong-Ook Jung, Suki Kim, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A low-power 2.1 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic

Sung-Mo Kang, Seong-Ook Jung, Soo Hwan Kim, 2002, The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002..

Noise constrained power optimization for dual V/sub T/ domino logic

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

All-Digital Process-Variation-Calibrated Timing Generator for ATE With 1.95-ps Resolution and Maximum 1.2-GHz Test Rate

Dong-Hoon Jung, Seong-Ook Jung, Kyungho Ryu, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Equalization scheme analysis for high-density spin transfer torque random access memory

Seong-Ook Jung, Taehui Na, Jung Pill Kim, 2016, 2016 International SoC Design Conference (ISOCC).

Dynamic mixed serial-parallel content addressable memory (DMSP CAM)

Seong-Ook Jung, Mingu Kang, Jisu Kim, 2013, Int. J. Circuit Theory Appl..

Reference-Scheme Study and Novel Reference Scheme for Deep Submicrometer STT-RAM

Seong-Ook Jung, Jisu Kim, Taehui Na, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Comparative Study of MRAM Sensing Circuits in 65nm Technology

Seong-Ook Jung, Seung H. Kang, Jisu Kim, 2009 .

Triplet-based Spike Timing Dependent Plasticity Circuit Design for three-terminal Spintronic Synapse

Seong-Ook Jung, Ki-Ryong Kim, Beomsang Yoo, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Comparative Analysis of Digital STDP Learning Circuits Designed Using Counter and Shift Register

Seong-Ook Jung, Sunghwan Joo, Jeongyong Sim, 2019, 2019 34th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC).

SRAM bitcell design for low voltage operation in deep submicron technologies

Seong-Ook Jung, Joseph Wang, Jisu Kim, 2011, 2011 IEEE International Conference on IC Design & Technology.

Low power SRAM bitcell design for near-threshold operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2016, 2016 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia).

Highly Independent MTJ-Based PUF System Using Diode-Connected Transistor and Two-Step Postprocessing for Improved Response Stability

Seong-Ook Jung, Byungkyu Song, Sehee Lim, 2020, IEEE Transactions on Information Forensics and Security.

Low-Power High-Performance Dynamic Circuit Design for Ultra-Deep Submicron Technology

Seong-Ook Jung, 2002 .

STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Fast Monte-Carlo analysis method of ring oscillators with neural networks

Hanwool Jeong, Seong-Ook Jung, Tae Hoon Choi, 2018, 2018 International Conference on Electronics, Information, and Communication (ICEIC).

Temperature-Tracking Sensing Scheme With Adaptive Precharge and Noise Compensation Scheme in PRAM

Seong-Ook Jung, Youngdon Choi, Jisu Kim, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM

Hanwool Jeong, Taejoong Song, Gyu-Hong Kim, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Double-Sensing-Margin Offset-Canceling Dual-Stage Sensing Circuit for Resistive Nonvolatile Memory

Seong-Ook Jung, Jisu Kim, Taehui Na, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation

Seong-Ook Jung, S. Simon Wong, Hyunwoo Nho, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

Noise constrained transistor sizing and power optimization for dual Vst domino logic

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2002, IEEE Trans. Very Large Scale Integr. Syst..

Coupling delay optimization by temporal decorrelation using dual threshold voltage technique

Taewhan Kim, Seong-Ook Jung, C. L. Liu, 2003, IEEE Trans. Very Large Scale Integr. Syst..

All-digital 90° phase-shift DLL with a dithering jitter suppression scheme

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference.

High-performance low-power magnetic tunnel junction based non-volatile flip-flop

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Effects of Electrical Characteristics on the Non-Rectangular Gate Structure Variations for the Multifinger MOSFETs

Seong-Ook Jung, Ilgu Yun, Jung Han Kang, 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Design of a 22-nm FinFET-Based SRAM With Read Buffer for Near-Threshold Voltage Operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2015, IEEE Transactions on Electron Devices.

SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit

Seong-Ook Jung, Juhyun Park, Joseph Wang, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Impact of fin thickness and height on read stability / write ability in tri-gate FinFET based SRAM

Hanwool Jeong, Seong-Ook Jung, Junha Lee, 2012, 2012 International SoC Design Conference (ISOCC).

Serial-Parallel Content Addressable Memory with a Conditional Driver (SPCwCD)

Seong-Ook Jung, Mingu Kang, 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A Split-Path Sensing Circuit for Spin Torque Transfer MRAM

Seong-Ook Jung, Jisu Kim, Taehui Na, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

Full-Swing Local Bitline SRAM Architecture Based on the 22-nm FinFET Technology for Low-Voltage Operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory

Seong-Ook Jung, Jisu Kim, Junyoung Ko, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache

Taejoong Song, Seong-Ook Jung, Tae Hyun Kim, 2020, IEEE Access.

Comparative analysis of MCU memory for IoT application

Seong-Ook Jung, Young-Jae An, Sunghwan Joo, 2018, 2018 International Conference on Electronics, Information, and Communication (ICEIC).

Comparative analysis of using planar MOSFET and FinFET as access transistor of STT-RAM Cell in 22-nm technology node

Hanwool Jeong, Seong-Ook Jung, Seung H. Kang, 2014, 2014 International SoC Design Conference (ISOCC).

Static read stability and write ability metrics in FinFET based SRAM considering read and write-assist circuits

Hanwool Jeong, Seong-Ook Jung, Junha Lee, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Efficient Hardware Implementation of STDP for AER Based Large-Scale SNN Neuromorphic System

Seong-Ook Jung, Sunghwan Joo, Jaeyoon Kim, 2020, 2020 35th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC).

All-Digital 90° Phase-Shift DLL With Dithering Jitter Suppression Scheme

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Integration of dual channel timing formatter system for high speed memory test equipment

Seong-Ook Jung, Sungho Kang, Woo-Young Choi, 2012, 2012 International SoC Design Conference (ISOCC).

An Energy-Efficient All-Digital Time-Domain-Based CMOS Temperature Sensor for SoC Thermal Management

Seong-Ook Jung, Young-Jae An, Kyungho Ryu, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation

Seong-Ook Jung, Tae Woo Oh, Hyun Kook Park, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Read-Preferred SRAM Cell With Write-Assist Circuit Using Back-Gate ETSOI Transistors in 22-nm Technology

Hanwool Jeong, Seong-Ook Jung, J. Wang, 2012, IEEE Transactions on Electron Devices.

High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter

Hanwool Jeong, Seong-Ook Jung, Taehui Na, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

High performance dynamic logic incorporating gate voltage controlled keeper structure for wide fan-in gates

Sung-Mo Kang, Seong-Ook Jung, 2002 .

An Energy Efficient Time-Domain Temperature Sensor for Low-Power On-Chip Thermal Management

Dong-Hoon Jung, Seong-Ook Jung, Young-Jae An, 2014, IEEE Sensors Journal.

A DLL based clock generator for low-power mobile SoCs

Seong-Ook Jung, Kyungho Ryu, Dong Hun Jung, 2010, IEEE Transactions on Consumer Electronics.

Slope interconnect effort: gate-interconnect interdependentdelay model for CMOS logic gates

Kaushik Roy, Seong-Ook Jung, Myeong-Eun Hwang, 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

Coupling delay optimization by temporal decorrelation using dual threshold voltage technique

Sung-Mo Kang, Seong-Ook Jung, C. L. Liu, 2001, DAC '01.

Parallel dynamic logic (PDL) with speed-enhanced skewed static (SSS) logic

Chulwoo Kim, Sung-Mo Kang, Seong-Ook Jung, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Bitline Charge-Recycling SRAM Write Assist Circuitry for $V_{\mathrm{MIN}}$ Improvement and Energy Saving

Taejoong Song, Seong-Ook Jung, Woojin Rim, 2019, IEEE Journal of Solid-State Circuits.

2-level LFSR scheme with asynchronous test pattern transfer for low cost and high efficiency build-in-self-test

Sung-Mo Kang, Seong-Ook Jung, Seung-Moon Yoo, 2001, GLSVLSI '01.

Video ram and serial data outputting method thereof

Seong-Ook Jung, 鄭盛旭, 1995 .

Replica Technique regarding research for Bit-Line tracking

Seong-Ook Jung, Se Hyeok Oh, Han-wool Jung, 2016 .

A Novel Sensing Circuit for Deep Submicron Spin Transfer Torque MRAM (STT-MRAM)

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Offset-Tolerant Dual-Reference-Voltage Sensing Scheme for Deep Submicrometer STT-RAM

Seong-Ook Jung, Jisu Kim, Taehui Na, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Latch Offset Cancellation Sense Amplifier for Deep Submicrometer STT-RAM

Seong-Ook Jung, Seung H. Kang, Jisu Kim, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM

Seong-Ook Jung, Suk Min Kim, Byungkyu Song, 2018, 2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

A 32-bit carry lookahead adder using dual-path all-N logic

Sung-Mo Kang, Seong-Ook Jung, Suki Kim, 2005, IEEE Trans. Very Large Scale Integr. Syst..

Reference-circuit analysis for high-bandwidth spin transfer torque random access memory

Seong-Ook Jung, Taehui Na, Jung Pill Kim, 2015, 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

Pseudo NMOS based sense amplifier for high speed single-ended SRAM

Hanwool Jeong, Taewon Kim, Taejoong Song, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

New current-mode sense amplifiers for high density DRAM and PIM architectures

Chulwoo Kim, Sung-Mo Kang, Seong-Ook Jung, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

SRAM Cell with Data-Aware Power-Gating Write-Asist for Near-Threshold Operation

Seong-Ook Jung, Tae Woo Oh, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A 10T-4MTJ Nonvolatile Ternary CAM Cell for Reliable Search Operation and a Compact Area

Seong-Ook Jung, Seung H. Kang, Taehui Na, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

GRO‐TDC with gate‐switch‐based delay cell halving resolution limit

Seong-Ook Jung, Dong-Hoon Jung, Jung-Hyun Park, 2017, Int. J. Circuit Theory Appl..

Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM

Hanwool Jeong, Taewon Kim, Taejoong Song, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS

Seong-Ook Jung, Seung H. Kang, Taehui Na, 2017, IEEE Journal of Solid-State Circuits.

A comparative study of STT-MTJ based non-volatile flip-flops

Seong-Ook Jung, Kyungho Ryu, Jisu Kim, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A DLL With Dual Edge Triggered Phase Detector for Fast Lock and Low Jitter Clock Generator

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Design Methodologies for STT-MRAM (Spin-Torque Transfer Magnetic Random Access Memory) Sensing Circuits

Seong-Ook Jung, Jisu Kim, Seung-Hyuk Kang, 2010, IEICE Trans. Electron..

Minimum delay optimization for domino logic circuits---a coupling-aware approach

Sung-Mo Kang, Taewhan Kim, Seong-Ook Jung, 2003, TODE.

Sensing margin trend with technology scaling in MRAM

Seong-Ook Jung, Jisu Kim, Seung-Hyuk Kang, 2011, Int. J. Circuit Theory Appl..

Power-Gated 9T SRAM Cell for Low-Energy Operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology

Hanwool Jeong, Seong-Ook Jung, Joseph Wang, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

Variation-Tolerant WL Driving Scheme for High-Capacity NAND Flash Memory

Seong-Ook Jung, Moosung Kim, Younghwi Yang, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Timing constraints for domino logic gates with timing-dependent keepers

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Read Disturbance Reduction Technique for Offset-Canceling Dual-Stage Sensing Circuits in Deep Submicrometer STT-RAM

Seong-Ook Jung, Taehui Na, Jung Pill Kim, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 90° phase-shift DLL with closed-loop DCC for high-speed mobile DRAM interface

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2010, IEEE Transactions on Consumer Electronics.

Thermal and solar energy harvesting boost converter with time-multiplexing MPPT algorithm

Seong-Ook Jung, Ki-Ryong Kim, Dong-Hoon Jung, 2016, IEICE Electron. Express.

Sense-Amplifier-Based Flip-Flop With Transition Completion Detection for Low-Voltage Operation

Hanwool Jeong, Seong-Ook Jung, Seung Chul Song, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Noise-aware interconnect power optimization in domino logic synthesis

Sung-Mo Kang, Seong-Ook Jung, C. L. Liu, 2003, IEEE Trans. Very Large Scale Integr. Syst..

An MTJ‐based non‐volatile flip‐flop for high‐performance SoC

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2014, Int. J. Circuit Theory Appl..

A low-power and small-area all-digital delay-locked loop with closed-loop duty-cycle correction

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2012, 2012 Proceedings of the ESSCIRC (ESSCIRC).

Pulsed PMOS sense amplifier for high speed single-ended SRAM

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2018, 2018 International Conference on Electronics, Information, and Communication (ICEIC).

Sensing voltage compensation circuit for low-power dram bit-line sense amplifier

Seong-Ook Jung, Suk Min Kim, Tae Woo Oh, 2018, 2018 International Conference on Electronics, Information, and Communication (ICEIC).

Reliable Latency Extraction with NVSim Revision in Emerging NVM (ITC-CSCC 2019)

Seong-Ook Jung, Byungkyu Song, Wonsuk Seo, 2019, 2019 34th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC).

Coupling-aware minimum delay optimization for domino logic circuits

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Imbalance-Tolerant Bit-Line Sense Amplifier for Dummy-Less Open Bit-Line Scheme in DRAM

Seong-Ook Jung, Byungkyu Song, Suk Min Kim, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Adaptive Sensing Voltage Modulation Technique in Cross-Point OTS-PRAM

Seong-Ook Jung, Kwang Woo Lee, Hyun Kook Park, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

High Performance and Area Efficient Ferroelectric FET based Reconfigurable Logic Circuit

Seong-Ook Jung, Dong Han Ko, Sehee Lim, 2021, 2021 18th International SoC Design Conference (ISOCC).

Bitline Charge Sharing Suppressed Bitline and Cell Supply Collapse Assists for Energy-Efficient 6T SRAM

Seong-Ook Jung, Tae Woo Oh, Kiryong Kim, 2021, IEEE Access.

Differential Read/Write 7T SRAM With Bit-Interleaved Structure for Near-Threshold Operation

Seong-Ook Jung, Tae Woo Oh, Ji Sang Oh, 2021, IEEE Access.

High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops

Seong-Ook Jung, Tae Woo Oh, Se Keon Kim, 2021, IEEE Access.

Comparative Analysis and Energy-Efficient Write Scheme of Ferroelectric FET-Based Memory Cells

Seong-Ook Jung, Tae Woo Oh, Dong Han Ko, 2021, IEEE Access.

SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling

Seong-Ook Jung, Ki-Ryong Kim, Tae Woo Oh, 2021, 2021 Symposium on VLSI Circuits.

A Wide-Range Static Current-Free Current Mirror-Based LS With Logic Error Detection for Near-Threshold Operation

Taejoong Song, Seong-Ook Jung, Hanwool Jeong, 2021, IEEE Journal of Solid-State Circuits.

Self-Referenced Single-Ended Resistance Monitoring Write Termination Scheme for STT-RAM Write Energy Reduction

Seong-Ook Jung, Seung H. Kang, Byungkyu Song, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

All-Bit-Line Read Scheme With Locking Bit-Line and Amplifying Sense Node in NAND Flash

Seong-Ook Jung, Jun Ho An, Hyun Kook Park, 2021, IEEE Access.

SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation

Seong-Ook Jung, Tae Woo Oh, Kiryong Kim, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Intrinsic Capacitance based Multi bit Computing in Memory

Seong-Ook Jung, Young Kyu Lee, Minjune Yeo, 2021, 2021 18th International SoC Design Conference (ISOCC).

Environmental-Variation-Tolerant Magnetic Tunnel Junction-Based Physical Unclonable Function Cell With Auto Write-Back Technique

Seong-Ook Jung, Seung H. Kang, Byungkyu Song, 2021, IEEE Transactions on Information Forensics and Security.

Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface.

Seong-Ook Jung, Kyungho Ryu, Dong-Hoon Jung, 2012 .

Noise-aware power optimization for on-chip interconnect

Sung-Mo Kang, Seong-Ook Jung, C.L. Liu, 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

Variation-Aware Figure of Merit for Integrated Circuit in Near-Threshold Region

Seong-Ook Jung, Younghwi Yang, Geoffrey Yeap, 2015, IEEE Transactions on Electron Devices.