Tomoko Mizutani

发表

Statistical advantages of intrinsic channel fully depleted SOI MOSFETs over bulk MOSFETs

Anil Kumar, Toshiro Hiramoto, Takuya Saraya, 2011, 2011 IEEE Custom Integrated Circuits Conference (CICC).

Measurement of SRAM Power-up Data using an Addressable Cell Array Test Structure

Hirofumi Shinohara, Toshiro Hiramoto, Takuya Saraya, 2016 .

Statistical Write Stability Characterization in SRAM Cells at Low Supply Voltage

Nobuyuki Sugii, Masaharu Kobayashi, Toshiro Hiramoto, 2016, IEEE Transactions on Electron Devices.

Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure

Masaharu Kobayashi, Toshiro Hiramoto, Takuya Saraya, 2016, 2016 International Conference on Microelectronic Test Structures (ICMTS).

Parallel nonvolatile programming of power-up states of SRAM cells

Masaharu Kobayashi, Toshiro Hiramoto, Kiyoshi Takeuchi, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

Parallel programmable nonvolatile memory using ordinary static random access memory cells

Hirofumi Shinohara, Toshiro Hiramoto, Takuya Saraya, 2017 .

Measurement of Static Random Access Memory Power-Up State Using an Addressable Cell Array Test Structure

Masaharu Kobayashi, Toshiro Hiramoto, Takuya Saraya, 2017, IEEE Transactions on Semiconductor Manufacturing.

Statistical Analysis of Current Onset Voltage (COV) Distribution of Scaled MOSFETs

Anil Kumar, Toshiro Hiramoto, Tomoko Mizutani, 2013, IEICE Trans. Electron..

Measurement of environmental gamma-ray dose rate around the Nuclear Fuel Cycle Engineering Laboratories, JAEA

Hajime Watanabe, Tomoko Mizutani, Toshimitsu Onuma, 2011 .

A new write stability metric using extended write butterfly curve for yield estimation in SRAM cells at low supply voltage

Masaharu Kobayashi, Toshiro Hiramoto, Takuya Saraya, 2016, 2016 International Conference on Microelectronic Test Structures (ICMTS).

Ultralow-Power SOTB CMOS Technology Operating Down to 0.4 V

Nobuyuki Sugii, Koichiro Ishibashi, Toshiro Hiramoto, 2014 .

Statistical analysis of four write stability metrics in fully depleted silicon-on-thin-BOX (SOTB) and bulk SRAM cells at low supply voltage

Nobuyuki Sugii, Masaharu Kobayashi, Toshiro Hiramoto, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Comparison and Statistical Analysis of Four Write Stability Metrics in Bulk CMOS SRAM Cells

Toshiro Hiramoto, Takuya Saraya, Tomoko Mizutani, 2014 .

Impact of random telegraph noise on write stability in Silicon-on-Thin-BOX (SOTB) SRAM cells at low supply voltage in sub-0.4V regime

Nobuyuki Sugii, Masaharu Kobayashi, Toshiro Hiramoto, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

Toward 0.1V operation of MOSFETs for ultra-low power applications

Toshiro Hiramoto, Takuya Saraya, Seung-Min Jung, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Transistor-level characterization of static random access memory bit failures induced by random telegraph noise

Toshiro Hiramoto, Takuya Saraya, Masaharu Kobayashi, 2016 .

Ultralow-voltage design and technology of silicon-on-thin-buried-oxide (SOTB) CMOS for highly energy efficient electronics in IoT era

Hideharu Amano, Kazutoshi Kobayashi, Kimiyoshi Usami, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Self-align implantation for n+-layer technology (SAINT) for high-speed GaAs ICs

Tomoko Mizutani, T. Mizutani, K. Asai, 1982 .

Origin of Larger Drain Current Variability in N-Type Field-Effect Transistors Analyzed by Variability Decomposition Method

Tohru Mogami, Akio Nishida, Toshiro Hiramoto, 2010 .

High-Temperature Properties of Drain Current Variability in Scaled Field-Effect Transistors Analyzed by Decomposition Method

Tohru Mogami, Akio Nishida, Toshiro Hiramoto, 2011 .

Comparison of statistical distributions of random telegraph noise (RTN) in subthreshold region and strong inversion region

Toshiro Hiramoto, Takuya Saraya, Tomoko Mizutani, 2014, 2014 Silicon Nanoelectronics Workshop (SNW).