M. Sellier

An Evaluation of the CMOS Technology Roadmap From the Point of View of Variability, Interconnects, and Power Dissipation

T. Skotnicki, F. Boeuf, A. Farcy, 2008, IEEE Transactions on Electron Devices.

Innovative Materials, Devices, and CMOS Technologies for Low-Power Mobile Multimedia

T. Skotnicki, S. Monfray, F. Arnaud, 2008, IEEE Transactions on Electron Devices.

Using Model for Assessment of Complementary Metal Oxide Semiconductor Technology and Roadmaps as a Pre-Simulation Program with Integrated Circuit Emphasis Model Generator for Early Technology and Circuit Simulation

Frederic Boeuf, Thomas Skotnicki, M. Sellier, 2008 .

Impact of Layout, Interconnects and Variability on CMOS Technology Roadmap

T. Skotnicki, F. Boeuf, A. Farcy, 2007, 2007 IEEE Symposium on VLSI Technology.