Kinam Kim

发表

Engineering of efficiency limiting free carriers and an interfacial energy barrier for an enhancing piezoelectric generation

Zhong Lin Wang, Sanghyo Lee, Seong-Min Kim, 2013 .

High Density (256Mb and Beyond) PRAM Integration Using 3-D Cell Array Transistors(Plenary Session,AWAD2006)

Gitae Jeong, Kinam Kim, 2006 .

Neuromorphic electronics based on copying and pasting the brain

Donhee Ham, Kinam Kim, Hongkun Park, 2021, Nature Electronics.

Three-dimensional MBCFET as an ultimate transistor

Chang Woo Oh, Donggun Park, Kinam Kim, 2004 .

Deep Trench Isolation for Crosstalk Suppression in Active Pixel Sensors with 1.7 µm Pixel Pitch

Kinam Kim, Chang-Rok Moon, Kee-Hyun Paik, 2007 .

Landscape for semiconductor analysis: Issues and challenges

Kinam Kim, Gyeong-Su Park, Kinam Kim, 2011, 18th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

Hf-silicate inter-poly dielectric technology for sub 70nm body tied FinFET flash memory

Donggun Park, Byung-Il Ryu, Yonghan Roh, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Switching field distribution in magnetic tunnel junctions with a synthetic antiferromagnetic free layer

Gwan-Hyeob Koh, J. H. Park, Kinam Kim, 2005 .

A 70nm NOR flash technology with 0.049 /spl mu/m/sup 2/ cell size

Kinam Kim, Younggoan Jang, Jaehoon Kim, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Robust 2-D Stack Capacitor Technologies for 64Mb 1T1C FRAM

Sung-Wook Kang, J. H. Park, Kinam Kim, 2006 .

Writing current reduction and total set resistance analysis in PRAM

Dae-Hwan Kang, Gwan-Hyeob Koh, Jeong-Taek Kong, 2008 .

A novel sub-50 nm multi-bridge-channel MOSFET (MBCFET) with extremely high performance

Chang Woo Oh, Donggun Park, Kinam Kim, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Temperature Dependence of Endurance Characteristics in NOR Flash Memory Cells

Kinam Kim, W.H. Lee, Chan-Kwang Park, 2006, 2006 IEEE International Reliability Physics Symposium Proceedings.

Effect of the Bottom Electrode Contact (BEC) on the phase transformation of N 2 doped Ge 2 Sb 2 Te 5 (N-GST) in a Phase-change Random Access Memory

J. H. Park, Kinam Kim, Sungsam Lee, 2004 .

Integration of lead zirconium titanate thin films for high density ferroelectric random access memory

Kinam Kim, Kinam Kim, Sung-Yung Lee, 2006 .

Highly manufacturable 90 nm DRAM technology

S.H. Hong, C.H. Cho, D.J. Lee, 2002, Digest. International Electron Devices Meeting,.

Key Integration Technologies for Nanoscale FRAMs

S.Y. Kim, H.S. Kim, J.H. Kim, 2007, 2007 Sixteenth IEEE International Symposium on the Applications of Ferroelectrics.

A cost effective embedded DRAM integration for high density memory and high performance logic using 0.15 /spl mu/m technology node and beyond

Gwan-Hyeob Koh, Dae-Won Ha, Kinam Kim, 2000 .

The origin and elimination of random single-bit failure in high density 1t1c fram

Kinam Kim, N. W. Jang, H. H. Kim, 2001 .

Soft error immune 0.46 /spl mu/m/sup 2/ SRAM cell with MIM node capacitor by 65 nm CMOS technology for ultra high speed SRAM

Kinam Kim, Hoosung Cho, Soon-Moon Jung, 2003, IEEE International Electron Devices Meeting 2003.

Charge-trapping memory cell of SiO2∕SiN∕high‐k dielectric Al2O3 with TaN metal gate for suppressing backward-tunneling effect

Kinam Kim, Kyu-Charn Park, Kinam Kim, 2005 .

Novel cell transistor using retracted Si/sub 3/N/sub 4/-liner STI for the improvement of data retention time in gigabit density DRAM and beyond

Kinam Kim, Kinam Kim, Joo-young Lee, 2001 .

A Novel Encapsulation Technology for Mass-Productive 150 nm, 64-Mb, 1T1C FRAM

S.Y. Kim, S.Y. Lee, H.S. Kim, 2007, 2007 Sixteenth IEEE International Symposium on the Applications of Ferroelectrics.

Highly sensitive and reliable X-ray detector with HgI2 photoconductor and oxide drive TFT

U-In Chung, Kinam Kim, Chang Jung Kim, 2011, 2011 International Electron Devices Meeting.

Advanced Integration Process Technology for Highly Reliable Ferroelectric Devices

Hee-Sung Kang, J. H. Park, Kinam Kim, 2004 .

A 2 Gb NAND flash memory with 0.044 /spl mu/m/sup 2/ cell size using 90 nm flash technology

Donggun Park, Kinam Kim, Wang-Chul Shin, 2002, Digest. International Electron Devices Meeting,.

Current and Future High Density FRAM Technology

Kinam Kim, Yoon J. Song, 2004 .

Dielectric loss peak due to platinum electrode porosity in lead zirconate titanate thin-film capacitors

James F. Scott, Matthew Dawber, Kinam Kim, 2002 .

Integrated device and process technology for sub-70nm low power DRAM

Kinam Kim, Junwoong Park, Hyungtak Kim, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Sub-25nm single-metal gate CMOS multi-bridge-channel MOSFET (MBCFET) for high performance and low power application

Donggun Park, Kinam Kim, Byung-il Ryu, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Memory Technologies for Sub-40nm: Materials, Processes, and Structures

Kinam Kim, Kinam Kim, Daewon Ha, 2008 .

Hot carrier generation and reliability of BT(body-tied)-Fin type SRAM cell transistors (W/sub fin/=20/spl sim/70 nm)

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2005, 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual..

Sub 30 nm multi-bridge-channel MOSFET (MBCFET) with metal gate electrode for ultra high performance application

Chang Woo Oh, Sung Hwan Kim, Donggun Park, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Deposition-temperature-dependent stress of capping oxide and its effect on Pt/Pb(Zr1−xTix)O3/Pt ferroelectric capacitor

Young-soo Park, Dong Jin Jung, Kinam Kim, 1999 .

A 0.24/spl mu/m 2.0V 1T1MTJ 16kb NV magnetoresistance RAM with self reference sensing

Kinam Kim, Gwanhyeob Koh, Gitae Jeong, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

A Novel Structure of SiO2/SiN/High k Dielectrics, Al2O3 for SONOS Type Flash Memory

Donggun Park, Kinam Kim, Sung-Hoi Hur, 2002 .

The impact of isolation pitch scaling on V/sub TH/ fluctuation in DRAM cell transistors due to neighboring drain/source electric field penetration

Jai-Hoon Sim, Kinam Kim, Jae-Kyu Lee, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Enhanced data retention of damascene-finFET DRAM with local channel implantation and <100> fin surface orientation engineering

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Highly-scalable threshold switching select device based on chaclogenide glasses for 3D nanoscaled memory arrays

U-In Chung, Dongsoo Lee, Hojung Kim, 2012, 2012 International Electron Devices Meeting.

Highly area efficient and cost effective double stacked S/sup 3/ (stacked single-crystal Si) peripheral CMOS SSTFT and SRAM cell technology for 512M bit density SRAM

Byung-Il Ryu, Jaehoon Jang, Kinam Kim, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Local-damascene-finFET DRAM integration with p/sup +/ doped poly-silicon gate technology for sub-60nm device generations

Ju-Yong Lee, Kinam Kim, Seung-Chul Yang, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Highly manufacturable 4 Gb DRAM using using 0.11 /spl mu/m DRAM technology

Y.S. Hwang, M.H. Cho, W.S. Yang, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

The Features and Characteristics of 5-mega CMOS Image Sensor with Topologically Unique 1.7/spl m/m~1.7/spl mu/m Pixels

Kinam Kim, Chang-Rok Moon, Jong-Cheol Shin, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

A 0.4-/spl mu/m 3.3-V 1T1C 4-Mb nonvolatile ferroelectric RAM with fixed bitline reference voltage scheme and data protection circuit

Kang-Deog Suh, Yeonbae Chung, Mun-Kyu Choi, 2000, IEEE Journal of Solid-State Circuits.

Current Development Status and Future Challenges of Ferroelectric Random Access Memory Technologies

Kinam Kim, Kinam Kim, Sung-Yung Lee, 2006 .

1D thickness scaling study of phase change material (Ge2Sb2Te5) using a pseudo 3-terminal device

H.-S. Philip Wong, Joo-Tae Moon, Yuan Zhang, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

A strategy for long data retention time of 512 Mb DRAM with 0.12 /spl mu/m design rule

S.H. Hong, Kinam Kim, G.T. Jeong, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

Highly reliable etching mask technology for high density fram

Kinam Kim, Suk-ho Joo, N. W. Jang, 2001 .

Ultra-low power and high speed SRAM for mobile applications using single Poly-Si gate 90 nm CMOS technology

Kinam Kim, D. Park, K. Koh, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Fully working high performance multi-channel field effect transistor (McFET) SRAM cell on bulk Si substrate using TiN single metal gate

Sung Min Kim, Chang Woo Oh, Sung Hwan Kim, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Highly manufacturable sub-50 nm high performance CMOSFET using real damascene gate process

Donggun Park, Kyung-Hwan Yeo, Kinam Kim, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Quality assured mass productive 1.6V operational 0.18 /spl mu/m 1T1C FRAM embedded smart card with advanced integration technologies against defectives

S.Y. Lee, Kinam Kim, S.K. Kang, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Data Retention Time and Electrical Characteristics of Cell Transistor According to STI Materials in 90 ㎚ DRAM

J. W. Lee, Kinam Kim, Sungsam Lee, 2003 .

Robust memory cell capacitor using multi-stack storage node for high performance in 90 nm technology and beyond

Kinam Kim, Jaegoo Lee, Yongseok Ahn, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

RF performance of pre-patterned locally-embedded-back-gate graphene device

Jaikwang Shin, Kinam Kim, Inkyeong Yoo, 2010, 2010 International Electron Devices Meeting.

Self-Aligned Local Channel Implantation Using Reverse Gate Pattern for Deep Submicron Dynamic Random Access Memory Cell Transistors

Kinam Kim, Daewon Ha, Jai–hoon Sim, 1998 .

Highly Crystalline Soluble Acene Crystal Arrays for Organic Transistors: Mechanism of Crystal Growth During Dip‐Coating

John E. Anthony, Hwansoo Suh, Jaeyoung Jang, 2012 .

Integration and electrical properties of diffusion barrier for high density ferroelectric memory

Kinam Kim, S. O. Park, Yoon-Sik Park, 2000 .

A highly reliable 1T/1C ferroelectric memory

Yoon-Soo Chun, Kinam Kim, Dong-won Shin, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Phase-Change Behavior of Stoichiometric Ge2Sb2Te5 in Phase-Change Random Access Memory

Kinam Kim, Jong-Bong Park, Gyeong-Su Park, 2007 .

Prospects of Future Si Technologies in the Data‐Driven World

Kinam Kim, Gitae Jeong, Kinam Kim, 2016 .

Future Emerging New Memory Technologies

Kinam Kim, Suyoun Lee, 2004 .

High-performance cell transistor design using metallic shield embedded shallow trench isolation (MSE-STI) for Gbit generation DRAM's

Jai-Hoon Sim, Kinam Kim, Jae-Kyu Lee, 1999 .

A novel robust TiN/AHO/TiN capacitor and CoSi/sub 2/ cell pad structure for 70nm stand-alone and embedded DRAM technology and beyond

H.S. Kim, J.M. Park, Y.S. Hwang, 2002, Digest. International Electron Devices Meeting,.

Charge Trapping Memory Cell of TANOS (Si-Oxide-SiN-Al2O3-TaN) Structure Compatible to Conventional NAND Flash Memory

Ki-Tae Park, Sanghun Jeon, Jungdal Choi, 2006, 2006 21st IEEE Non-Volatile Semiconductor Memory Workshop.

World Smallest 0.34/spl mu/m~ COB Cell 1T1C 64Mb FRAM with New Sensing Architecture and Highly Reliable MOCVD PZT Integration Technology

S.Y. Lee, H.S. Kim, E.S. Lee, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Surface-stress-induced Mott transition and nature of associated spatial phase transition in single crystalline VO2 nanowires.

Docheon Ahn, Jung Inn Sohn, Kinam Kim, 2009, Nano letters.

Large thermoelectric figure-of-merits from SiGe nanowires by simultaneously measuring electrical and thermal transport properties.

Choongho Yu, Arun Majumdar, Dongmok Whang, 2012, Nano letters.

65nm high performance SRAM technology with 25F2 0.16/spl mu/m/sup 2/ S/sup 3/ (stacked single-crystal Si) SRAM cell, and stacked peripheral SSTFT for ultra high density and high speed applications

Kinam Kim, Hoosung Cho, Soon-Moon Jung, 2005, Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005..

A nonvolatile ferroelectric RAM with common plate folded bit-line cell and enhanced data sensing scheme

Mun-Kyu Choi, Kinam Kim, Yoonjong Song, 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

Nonlinear optics: Graphene–silicon fusion

Seong-Ho Cho, Kinam Kim, Chang-won Lee, 2012 .

Babinet-inverted optical Yagi-Uda antenna for unidirectional radiation to free space.

Chang-Won Lee, Young-Geun Roh, Un Jeong Kim, 2014, Nano letters.

8 Gb MLC (multi-level cell) NAND flash memory using 63 nm process technology

Joo-Tae Moon, U-In Chung, Byung-Il Ryu, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

A 0.25 /spl mu/m 3.0 V 1T1C 32 Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

Byung-Jun Min, Mun-Kyu Choi, Kinam Kim, 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

A process integration of high performance 64 Kb MRAM

S.Y. Lee, Kinam Kim, G.T. Jeong, 2003, Digest of INTERMAG 2003. International Magnetics Conference (Cat. No.03CH37401).

An improvement of retention property by using surface treatment in SOL-GEL derived PZT films

Kinam Kim, N. W. Jang, Suyoun Lee, 2001 .

130 nm-technology, 0.25 μm2, 1T1C FRAM cell for SoC (system-on-a-chip)-friendly applications

S.Y. Lee, H.S. Kim, E.S. Lee, 2007, 2007 IEEE Symposium on VLSI Technology.

Highly cost effective and high performance 65nm S/sup 3/ (stacked single-crystal Si) SRAM technology with 25F/sup 2/, 0.16um/sup 2/ cell and doubly stacked SSTFT cell transistors for ultra high density and high speed applications

Jaehoon Jang, Kinam Kim, Hoosung Cho, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Improvement of data retention time in DRAM using recessed channel array transistors with asymmetric channel doping for 80 nm feature size and beyond

Y.J. Park, J.Y. Kim, C.H. Cho, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).

A novel multi-channel field effect transistor (McFET) on bulk Si for high performance sub-80nm application

Sung Min Kim, Chang Woo Oh, Sung Hwan Kim, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Phase-change chalcogenide nonvolatile RAM completely based on CMOS technology

Y.T. Kim, S.Y. Lee, S.O. Park, 2003, 2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672).

Damascene gate FinFET SONOS memory implemented on bulk silicon wafer

Chang Woo Oh, Sung Hwan Kim, Donggun Park, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Electrical properties of highly reliable plug buffer layer for high-density ferroelectric memory

Kinam Kim, N. W. Jang, June Key Lee, 2002 .

High density stand alone-fram

Kinam Kim, 2001 .

A high performance 16 Mb DRAM using giga-bit technologies

Kinam Kim, Kim Kyung-Hoon, Gitae Jeong, 1997 .

A mechanically enhanced storage node for virtually unlimited height (MESH) capacitor aiming at sub 70nm DRAMs

Y.S. Lee, J.M. Park, Y.S. Hwang, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Characterization and Modeling of 1/$f$ Noise in Si-nanowire FETs: Effects of Cylindrical Geometry and Different Processing of Oxides

Yoon-Ha Jeong, Hyun-Sik Choi, Chang-Ki Baek, 2011, IEEE Transactions on Nanotechnology.

Edge Profile Effect of Tunnel Oxide on Erase Threshold-Voltage Distributions in Flash Memory Cells

Chang-Ki Baek, Bomsoo Kim, Kinam Kim, 2006, IEEE Transactions on Electron Devices.

A novel SONOS structure of SiO/sub 2//SiN/Al/sub 2/O/sub 3/ with TaN metal gate for multi-giga bit flash memories

Kinam Kim, Yun Heub Song, Kinam Kim, 2003, IEEE International Electron Devices Meeting 2003.

Negative Bias Temperature Instability(NBT1) of Bulk FinFETs

Donggun Park, Tai-su Park, Kinam Kim, 2005 .

Temperature Dependent Carrier Transport in Amorphous Oxide Field Effect Transistors

Kinam Kim, Kinam Kim, 2011 .

Application of Plasma-Doping (PLAD) Technique to Reduce Dark Current of CMOS Image Sensors

Kinam Kim, Chang-Rok Moon, Doo-Won Kwon, 2007, IEEE Electron Device Letters.

Prospect of Emerging Nonvolatile Memories

Kinam Kim, Hong-Sik Jeong, 2004 .

Direct observation of the structural component of the metal-insulator phase transition and growth habits of epitaxially grown VO2 nanowires.

Chel-Jong Choi, Jung Inn Sohn, Kinam Kim, 2007, Nano letters.

Anomalous junction leakage current induced by STI dislocations and its impact on dynamic random access memory devices

Gwan-Hyeob Koh, Dae-Won Ha, Kinam Kim, 1999 .

A high performance 16M DRAM on a thin film SOI

Kinam Kim, Jae-Hoon Shim, Kyu-han Lee, 1995, 1995 Symposium on VLSI Technology. Digest of Technical Papers.

Nearly single-crystalline GaN light-emitting diodes on amorphous glass substrates

Un Jeong Kim, Hwansoo Suh, Chan-Wook Baik, 2011 .

Fin width scaling criteria of body-tied FinFET in sub-50 nm regime

Jin Young Kim, Chang Woo Oh, Donggun Park, 2004, Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC..

Data retention characteristics of sub-100 nm NAND flash memory cells

Donggun Park, Kinam Kim, Jae-Duk Lee, 2003 .

Improvement in the electrical properties in Pt/Pb(Zr0.52Ti0.48)O3/Pt ferroelectric capacitors using a wet cleaning method

Seshu B. Desu, Young-soo Park, Dong Jin Jung, 1999 .

Technology perspective for 1T/1C fram

Kinam Kim, 1999 .

A VISION OF FRAM AS A FUSION MEMORY

Kinam Kim, Dong-Jin Jung, 2008 .

Investigation of pMOSFET Hot Electron Induced Punch Through (HEIP) in Shallow Trench Isolation

Kinam Kim, G.T. Jeong, T.Y. Chung, 2001, 31st European Solid-State Device Research Conference.

Field assisted spin switching in magnetic random access memory

Gwan-Hyeob Koh, J. H. Park, Kinam Kim, 2006 .

Heterogeneous stacking of nanodot monolayers by dry pick-and-place transfer and its applications in quantum dot light-emitting diodes

Dae-Hyeong Kim, Dae-Young Chung, Kyung-Sang Cho, 2013, Nature Communications.

From the future technology perspective: challenges and opportunities

Kinam Kim, 2010, 10th IEEE International Conference on Nanotechnology.

Writing current reduction for high-density phase-change RAM

S.Y. Lee, S.J. Ahn, Kinam Kim, 2003, IEEE International Electron Devices Meeting 2003.

A NOVEL ATE (ADDITIONAL TOP-ELECTRODE) SCHEME FOR A 1.6 V FRAM EMBEDDED DEVICE AT 180 NM TECHNOLOGY

Kinam Kim, Jung Hoon Park, Kinam Kim, 2007 .

The new program/erase cycling degradation mechanism of NAND flash memory devices

Kinam Kim, Kinam Kim, Jungdal Choi, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

High threshold voltage p-GaN gate power devices on 200 mm Si

U-In Chung, Hyun-Sik Choi, Woochul Jeon, 2013, 2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD).

The Forgotten

Kinam Kim, Kinam Kim, Kinam Kim, 2011, SIGGRAPH Asia Computer Animation Festival.