Didier Bouvet

发表

Hybrid Nanowire-MOS circuit architectures: from basic physics to digital and analog applications

Adrian M. Ionescu, Santanu Mahapatra, Serge Ecoffey, 2006 .

Downscaling and Short Channel Effects in Twin Gate Junctionless Vertical Slit FETs

Farzan Jazaeri, Jean-Michel Sallese, Lucian Barbut, 2013 .

Design space of twin gate junctionless vertical slit field effect transistors

Farzan Jazaeri, Jean-Michel Sallese, Lucian Barbut, 2013, Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013.

Novel technique for nanograin ultra-thin polysilicon film deposition and implantation

Adrian M. Ionescu, Pierre Fazan, Serge Ecoffey, 2003, 2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676).

Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays

Yusuf Leblebici, Giovanni De Micheli, Adrian M. Ionescu, 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories

Yusuf Leblebici, Giovanni De Micheli, Adrian M. Ionescu, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays

Adrian M. Ionescu, David Atienza, Yusuf Leblebici, 2007, ICCAD 2007.

Heavily doped junctionless vertical slit FETs with slit width Below 20 nm

Farzan Jazaeri, Jean-Michel Sallese, Lucian Barbut, 2013, Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013.

Low power finfet ph-sensor with high-sensitivity voltage readout

Antonios Bazigos, Adrian M. Ionescu, Andreas Hierlemann, 2013, 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC).

A study of fabrication techniques for sub-10nm thin undulated polysilicon films

Adrian M. Ionescu, Serge Ecoffey, Didier Bouvet, 2003, 2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676).

DRAM Based on Hysteresis in Impact Ionization Single-Transistor-Latch

Adrian M. Ionescu, Maher Kayal, Kirsten Moselund, 2008 .

A hybrid CMOS-SET co-fabrication platform using nano-grain polysilicon wires

Adrian M. Ionescu, Santanu Mahapatra, V. Pott, 2004 .

Towards fabrication of Vertical Slit Field Effect Transistor (VeSFET) as new device for nano-scale CMOS technology

Jean-Michel Sallese, Lucian Barbut, Didier Bouvet, 2011, CAS 2011 Proceedings (2011 International Semiconductor Conference).

Prospects for logic-on-a-wire

Yusuf Leblebici, Adrian M. Ionescu, David Atienza, 2008 .