Sesh Ramaswami

Design and manufacturing enablement for three-dimensional (3D) integrated circuits (ICs)

Zhe Li, Dale Ibbotson, Hong Shi, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

Process integration considerations towards 300 mm TSV manufacturing-moving beyond the champion SEM

Sesh Ramaswami, 2009, 2009 IEEE International Reliability Physics Symposium.

TSV Unit Processes and Integration

Sesh Ramaswami, 2014 .

Formation of TSV for the stacking of advanced logic devices utilizing bumpless wafer-on-wafer technology

Takayuki Ohba, S. W. Kim, Hideki Kitada, 2012 .

Fabrication and electrical characterization of 5×50um through silicon vias for 3D integration

Niranjan Kumar, Bharat Bhushan, Sesh Ramaswami, 2013, 2013 IEEE International Interconnect Technology Conference - IITC.

3D IC Stacking Technology

Banqiu Wu, Sesh Ramaswami, Ajay Kumar, 2011 .

Material, Process and Geometry Effects on Through-Silicon Via Reliability and Isolation

Sesh Ramaswami, John O. Dukovic, Aditya P. Karmarkar, 2010 .

A holistic approach to process co-optimization for through-silicon via

Sesh Ramaswami, 2011, 2011 International Reliability Physics Symposium.