Andreas Gothenberg

Power-Supply and Substrate-Noise-Induced Timing Jitter in Nonoverlapping Clock Generation Circuits

Hannu Tenhunen, Adam Strak, Andreas Gothenberg, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration

Kong-Pang Pun, Chi-Tung Ko, Andreas Gothenberg, 2015, Microelectron. J..

Improved wideband low distortion cascaded delta-sigma modulator

Xiaobo Wu, Xiaolong Yuan, Andreas Gothenberg, 2005, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05).

Performance analysis of sampling switches in voltage and frequency domains using Volterra series

Hannu Tenhunen, Andreas Gothenberg, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Vernier parallel delay-line based time-to-digital converter

Kong-Pang Pun, Chi-Tung Ko, Andreas Gothenberg, 2012 .