Gian Carlo Cardarilli

发表

Efficiency of a BCI system in a visual P300 protocol with different stimulation intervals

Lucia Rita Quitadamo, Manuel Abbafati, Giovanni Saggio, 2009, 2009 1st International Conference on Wireless Communication, Vehicular Technology, Information Theory and Aerospace & Electronic Systems Technology.

M-PSK Demodulator with Joint Carrier and Timing Recovery

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2020 .

CMOS and bipolar novel low-power adaptive biasing topologies

Gian Carlo Cardarilli, Marco Re, Giuseppe Ferri, 1999 .

A high speed VLSI architecture for scaled residue to binary conversion

Gian Carlo Cardarilli, M. Re, R. Lojacono, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Design of large polyphase filters in the Quadratic Residue Number System

Yann Oster, Gian Carlo Cardarilli, Marco Re, 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

Internal wordlength reduction in RNS recursive digital filters

Gian Carlo Cardarilli, R. Lojacono, Mario Salerno, 1991, [1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems.

A UML model for the description of different brain-computer interface systems

Lucia Rita Quitadamo, Manuel Abbafati, Giovanni Saggio, 2008, 2008 30th Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

Design, manufacturing and testing of self-monitoring MWCNT and CB loaded polymeric films and respective electronic wireless data acquisition system

Gian Carlo Cardarilli, Francesca Nanni, Francesco Madau, 2011 .

A Flexible OTA-based Neural Network Implementation with Digital Weight Storage

Gian Carlo Cardarilli, P. Marinucci, C. D Alessandro, 1994 .

CMOS adaptive biasing circuits for low-power applications

Gian Carlo Cardarilli, Giuseppe Ferri, 1997, 1997 21st International Conference on Microelectronics. Proceedings.

Low voltage swing circuits for low dissipation busses

Gian Carlo Cardarilli, Adelio Salsano, M. Salmeri, 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

A 1.6 V 80 /spl mu/W rail-to-rail constant-G/sub M/ bipolar adaptive biased op-amp input stage

Gian Carlo Cardarilli, G. Ferri, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Rail-to-rail adaptive biased low-power Op-Amp

Gian Carlo Cardarilli, M. Re, Giuseppe Ferri, 2001 .

Characterization of RNS multiply-add units for power efficient DSP

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2015, 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS).

RNS approach to full parallel linear combinators

Gian Carlo Cardarilli, R. Lojacono, Mario Salerno, 1990, International Conference on Acoustics, Speech, and Signal Processing.

Degrading precision arithmetic for low power signal processing

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

A low-voltage low-power rail-to-rail constant-Gm adaptive biased CMOS operational amplifier

Gian Carlo Cardarilli, Giuseppe Ferri, F. Bordoni, 1998, Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186).

Reducing power dissipation in FIR filters using the residue number system

Gian Carlo Cardarilli, M. Re, Alberto Nannarelli, 2000, Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144).

Hardware Prototyping and Validation of a W-ΔDOR Digital Signal Processor

Gian Carlo Cardarilli, Dario Gelfusa, Luciano Iess, 2019, Applied Sciences.

RNS-to-binary conversion for efficient VLSI implementation

Gian Carlo Cardarilli, Marco Re, R. Lojacono, 1998 .

RNS Fourier transforms

Gian Carlo Cardarilli, Giuseppe Martinelli, Pietro Burrascano, 1988, ICASSP-88., International Conference on Acoustics, Speech, and Signal Processing.

Degrading precision arithmetics for low-power FIR implementation

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

Hardware implementation of MPEG analysis and deblocking for video enhancement

Gian Carlo Cardarilli, Marco Re, Huiying Li, 2009, 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers.

Fault-tolerant solid state mass memory for satellite applications

Gian Carlo Cardarilli, Adelio Salsano, P. Marinucci, 1998, IMTC/98 Conference Proceedings. IEEE Instrumentation and Measurement Technology Conference. Where Instrumentation is Going (Cat. No.98CH36222).

$N$ -Dimensional Approximation of Euclidean Distance

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Single chip implementation of real time RNS IIR digital filters

Gian Carlo Cardarilli, R. Lojacono, Mario Salerno, 1992, Proceedings Euro ASIC '92.

A new hardware/software platform for the soft-error sensitivity evaluation of FPGA devices

Gian Carlo Cardarilli, Salvatore Pontarelli, Adelio Salsano, 2007 .

Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories]

Gian Carlo Cardarilli, M. Re, Salvatore Pontarelli, 2004 .

Low-power CMOS OTA input stages and voltage buffers based on adaptive biasing topology

Gian Carlo Cardarilli, M. Re, Giuseppe Ferri, 2000 .

HIGH SPEED RNS A/D FRONT END

Gian Carlo Cardarilli, R. Lojacono, Alberto Nannarelli, 2001 .

Standard Model, File Formats and Methods in Brain-Computer Interface Research: Why?

Febo Cincotti, Fabio Babiloni, Lucia Rita Quitadamo, 2009 .

Bipolar and CMOS low voltage-supply reduced-power voltage followers

Gian Carlo Cardarilli, M. Re, Giuseppe Ferri, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

16-point high speed (I)FFT for OFDM modulation

Gian Carlo Cardarilli, Adelio Salsano, S. Bertazzoni, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Fully digital intensity modulated LIDAR

Gian Carlo Cardarilli, Marco Re, Roberto Pizzoferrato, 2016 .

Bus architecture for low-power VLSI digital circuits

Gian Carlo Cardarilli, Adelio Salsano, M. Salmeri, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Efficient modulo extraction for CRT based residue to binary converters

Gian Carlo Cardarilli, M. Re, R. Lojacono, 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.