Himanshu Thapliyal

发表

Use of Thermistor Temperature Sensors for Cyber-Physical System Security

Stacy J. Prowell, Carson Labrado, Himanshu Thapliyal, 2019, Sensors.

Verilog Coding Style for Efficient Synthesis In FPGA

Hamid R. Arabnia, Rameshwar Rao, Himanshu Thapliyal, 2005, CDES.

A Survey of Affective Computing for Stress Detection: Evaluating technologies in stress detection for better health

Himanshu Thapliyal, Shalom Greene, Allison Caban-Holt, 2016, IEEE Consumer Electronics Magazine.

Design of Reversible Sequential Elements With Feasibility of Transistor Implementation

A. Prasad Vinod, Himanshu Thapliyal, H. Thapliyal, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Quantum Circuit Designs of Integer Division Optimizing T-count and T-depth

Travis S. Humble, Himanshu Thapliyal, Edgard Munoz-Coreas, 2020 .

EE-SPFAL: A Novel Energy-Efficient Secure Positive Feedback Adiabatic Logic for DPA Resistant RFID and Smart Card

Himanshu Thapliyal, S. Dinesh Kumar, Azhar Mohammad, 2019, IEEE Transactions on Emerging Topics in Computing.

Design of adder and subtractor circuits in majority logic-based field-coupled QCA nanocomputing

Carson Labrado, Himanshu Thapliyal, H. Thapliyal, 2016 .

Solving Energy and Cybersecurity Constraints in IoT Devices Using Energy Recovery Computing

Himanshu Thapliyal, Zachary Kahleifeh, H. Thapliyal, 2019, ACM Great Lakes Symposium on VLSI.

Exploring Human Body Communications for IoT Enabled Ambulatory Health Monitoring Systems

Saraju P. Mohanty, Elias Kougianos, Himanshu Thapliyal, 2016, 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Designing Efficient Online Testable Reversible Adders With New Reversible Gate

A. Prasad Vinod, Himanshu Thapliyal, A. P. Vinod, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Special Session: A Novel Low-Power and Energy-Efficient Adiabatic Logic-In-Memory Architecture Using CMOS/MTJ

Himanshu Thapliyal, S. Dinesh Kumar, S. D. Kumar, 2020, 2020 IEEE 38th International Conference on Computer Design (ICCD).

A new design of the reversible subtractor circuit

Himanshu Thapliyal, Nagarajan Ranganathan, H. Thapliyal, 2011, 2011 11th IEEE International Conference on Nanotechnology.

Conservative QCA Gate (CQCA) for Designing Concurrently Testable Molecular QCA Circuits

N. Ranganathan, Himanshu Thapliyal, 2009, 2009 22nd International Conference on VLSI Design.

Combined Integer and Variable Precision (CIVP) Floating Point Multiplication Architecture for FPGAs pdf

Hamid R. Arabnia, Himanshu Thapliyal, Rajnish Bajpai, 2007, PDPTA.

Hardware Trojan Detection in Implantable Medical Devices Using Adiabatic Computing

Himanshu Thapliyal, S. Dinesh Kumar, Zach Kahleifeh, 2018, 2018 IEEE International Conference on Rebooting Computing (ICRC).

A New Reversible TSG Gate and Its Application For Designing Efficient Adder Circuits pdf

Himanshu Thapliyal, M. B. Srinivas, H. Thapliyal, 2006, ArXiv.

Security Evaluation of MTJ/CMOS Circuits Against Power Analysis Attacks

Himanshu Thapliyal, S. Dinesh Kumar, S. D. Kumar, 2017, 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Panel theme: Energy and cybersecurity constraints on consumer electronics

Himanshu Thapliyal, 2018, 2018 IEEE International Conference on Consumer Electronics (ICCE).

A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs

Hamid R. Arabnia, Himanshu Thapliyal, Vishal Verma, 2006, CDES.

Novel Reversible Multiplier Architecture Using Reversible TSG Gate

Himanshu Thapliyal, M. B. Srinivas, H. Thapliyal, 2006, IEEE International Conference on Computer Systems and Applications, 2006..

Design of A ternary barrel shifter using multiple-valued reversible logic

Himanshu Thapliyal, Nagarajan Ranganathan, Saurabh Kotiyal, 2010, 10th IEEE International Conference on Nanotechnology.

Design of Quantum Computing Circuits

Himanshu Thapliyal, Edgard Muñoz-Coreas, H. Thapliyal, 2019, IT Professional.

A PUF Based CAN Security Framework

Carson Labrado, Himanshu Thapliyal, Tyler Cultice, 2020, 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

T-count and Qubit Optimized Quantum Circuit Designs of Carry Lookahead Adder pdf

Himanshu Thapliyal, Edgard Munoz-Coreas, Vladislav Khalus, 2020, ArXiv.

Stress Detection and Management: A Survey of Wearable Smart Health Devices

Carson Labrado, Himanshu Thapliyal, Vladislav Khalus, 2017, IEEE Consumer Electronics Magazine.

A Reversible Version of 4 x 4 Bit Array Multiplier With Minimum Gates and Garbage Outputs

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, ESA.

Smart Home Environment for Mild Cognitive Impairment Population: Solutions to Improve Care and Quality of Life

Saraju P. Mohanty, Himanshu Thapliyal, Rajdeep Kumar Nath, 2018, IEEE Consumer Electronics Magazine.

Reversible Logic to Cryptographic Hardware: A New Paradigm

Mark Zwolinski, Himanshu Thapliyal, H. Thapliyal, 2006, 2006 49th IEEE International Midwest Symposium on Circuits and Systems.

Quasi-Adiabatic SRAM Based Silicon Physical Unclonable Function

Himanshu Thapliyal, Hiroki Koyasu, Yasuhiro Takahashi, 2020, SN Computer Science.

Harnessing Uncertainty in Photoresistor Sensor for True Random Number Generation in IoT Devices

Amit Degada, Himanshu Thapliyal, 2020, 2020 IEEE International Conference on Consumer Electronics (ICCE).

T-count Optimized Design of Quantum Integer Multiplication pdf

Himanshu Thapliyal, Edgard Muñoz-Coreas, H. Thapliyal, 2017, ArXiv.

Faster RSA Encryption/Decryption Architecture Using an Efficient High Speed Overlay Multiplier

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, Security and Management.

Design, Synthesis and Test of Reversible Circuits for Emerging Nanotechnologies

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2012, 2012 IEEE Computer Society Annual Symposium on VLSI.

Low-Power and Energy-Efficient Full Adders With Approximate Adiabatic Logic for Edge Computing

Wu Yang, Himanshu Thapliyal, 2020, 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2009, 2009 IEEE Computer Society Annual Symposium on VLSI.

Reduced Area Low Power High Throughput BCD Adders for IEEE 754r Format pdf

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2006, ArXiv.

Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2010, JETC.

Mach-Zehnder interferometer based design of all optical reversible binary adder

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Design And Analysis of A VLSI Based High Performance Low Power Parallel Square Architecture

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, AMCS.

Approximate Adder Circuits Using Clocked CMOS Adiabatic Logic (CCAL) for IoT Applications

Himanshu Thapliyal, Cole Terrell, 2020, 2020 IEEE International Conference on Consumer Electronics (ICCE).

Design of quaternary 4-2 and 5-2 compressors for nanotechnology

Keivan Navi, Fazel Sharifi, Himanshu Thapliyal, 2016, Comput. Electr. Eng..

Mapping of Subtractor and Adder-Subtractor Circuits on Reversible Quantum Gates

Himanshu Thapliyal, H. Thapliyal, 2016, Trans. Comput. Sci..

Energy-efficient magnetic circuits based on nanoelectronic devices

Fazel Sharifi, Himanshu Thapliyal, H. Thapliyal, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Novel BCD adders and their reversible logic implementation for IEEE 754r format

Himanshu Thapliyal, M. B. Srinivas, Saurabh Kotiyal, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

T-count and Qubit Optimized Quantum Circuit Design of the Non-Restoring Square Root Algorithm

Himanshu Thapliyal, Edgard Muñoz-Coreas, H. Thapliyal, 2017, ACM J. Emerg. Technol. Comput. Syst..

Reversible Logic Based Design and Test of Field Coupled Nanocomputing Circuits

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2014, Field-Coupled Nanocomputing.

Combined Integer and Floating Point Multiplication Architecture(CIFM) for FPGAs and Its Reversible Logic Implementation

Hamid R. Arabnia, A. Prasad Vinod, Himanshu Thapliyal, 2006, 2006 49th IEEE International Midwest Symposium on Circuits and Systems.

T-count Optimized Quantum Circuits for Bilinear Interpolation

Himanshu Thapliyal, Edgard Muñoz-Coreas, 2018, 2018 Ninth International Green and Sustainable Computing Conference (IGSC).

Solar Cell Based Physically Unclonable Function for Cybersecurity in IoT Devices

Carson Labrado, Himanshu Thapliyal, S. Dinesh Kumar, 2018, 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

A Reversible Programmable Logic Array (RPLA) Using Fredkin and Feynman Gates for Industrial Electronics and Applications pdf

Hamid R. Arabnia, Himanshu Thapliyal, H. Thapliyal, 2006, CDES.

Low-Power and Secure Lightweight Cryptography Via TFET-Based Energy Recovery Circuits

Himanshu Thapliyal, T. S. S. Varun, S. Dinesh Kumar, 2017, 2017 IEEE International Conference on Rebooting Computing (ICRC).

Design of a reversible single precision floating point multiplier based on operand decomposition

Himanshu Thapliyal, Nagarajan Ranganathan, Michael Nachtigal, 2010, 10th IEEE International Conference on Nanotechnology.

Machine Learning Based Solutions for Real-Time Stress Monitoring

Saraju P. Mohanty, Himanshu Thapliyal, Allison Caban-Holt, 2020, IEEE Consumer Electronics Magazine.

A Need of Quantum Computing: Reversible Logic Synthesis of Parallel Binary Adder-Subtractor

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, ESA.

IoT-Based Fall Detection for Smart Home Environments

Himanshu Thapliyal, Shalom Greene, David Carpenter, 2016, 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Reversible logic based concurrent error detection methodology for emerging nanocircuits

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2010, 10th IEEE International Conference on Nanotechnology.

VLSI implementation of RSA encryption system using ancient Indian Vedic mathematics

Himanshu Thapliyal, M. B. Srinivas, H. Thapliyal, 2005, SPIE Microtechnologies.

Design of Adiabatic Logic-Based Energy-Efficient and Reliable PUF for IoT Devices

Himanshu Thapliyal, S. Dinesh Kumar, 2020, ACM J. Emerg. Technol. Comput. Syst..

Design of Quantum Circuits for Cryptanalysis and Image Processing Applications

Himanshu Thapliyal, Edgard Muñoz-Coreas, H. Thapliyal, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Reversible logic based multiplication computing unit using binary tree data structure

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2015, The Journal of Supercomputing.

Special Session: Quantum Carry Lookahead Adders for NISQ and Quantum Image Processing

Himanshu Thapliyal, Edgard Muñoz-Coreas, Vladislav Khalus, 2020, 2020 IEEE 38th International Conference on Computer Design (ICCD).

Energy-Efficient and Secure S-Box Circuit Using Symmetric Pass Gate Adiabatic Logic

Himanshu Thapliyal, Kalyan S. Perumalla, S. Dinesh Kumar, 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Implementation of A Fast Square In RSA Encryption/Decryption Architecture

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, Security and Management.

Low Power Hierarchical Multiplier and Carry Look-Ahead Architecture

Himanshu Thapliyal, M. B. Srinivas, Gopi Neela, 2006, IEEE International Conference on Computer Systems and Applications, 2006..

Design of efficient reversible logic-based binary and BCD adder circuits

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2013, JETC.

Mach-Zehnder Interferometer Based All Optical Reversible NOR Gates

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2012, 2012 IEEE Computer Society Annual Symposium on VLSI.

Modified Carry Look Ahead BCD Adder With CMOS and Reversible Logic Implementation

Hamid R. Arabnia, Himanshu Thapliyal, 2006, CDES.

Design of Dedicated Reversible Quantum Circuitry for Square Computation

H. V. Jayashree, Himanshu Thapliyal, V. K. Agrawal, 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.

Validating Physiological Stress Detection Model Using Cortisol as Stress Bio Marker

Himanshu Thapliyal, Allison Caban-Holt, Rajdeep Kumar Nath, 2020, 2020 IEEE International Conference on Consumer Electronics (ICCE).

Adiabatic Computing Based Low-Power and DPA-Resistant Lightweight Cryptography for IoT Devices

Himanshu Thapliyal, T. S. S. Varun, S. Dinesh Kumar, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Tutorial T2: Reversible Logic: Fundamentals and Applications in Ultra-Low Power, Fault Testing and Emerging Nanotechnologies, and Challenges in Future

N. Ranganathan, Himanshu Thapliyal, 2012, 2012 25th International Conference on VLSI Design.

Adiabatic Logic Based Energy-Efficient Security for Smart Consumer Electronics

Himanshu Thapliyal, Zachary Kahleifeh, 2020 .

Design of Reversible Adder-Subtractor and its Mapping in Optical Computing Domain

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2014, Trans. Comput. Sci..

IoT based indoor location detection system for smart home environment

Himanshu Thapliyal, Rajnish Bajpai, Rajdeep Kumar Nath, 2018, 2018 IEEE International Conference on Consumer Electronics (ICCE).

Quantum Computing Circuits and Devices

Ryan S. Bennink, Travis S. Humble, Himanshu Thapliyal, 2018, IEEE Design & Test.

Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures

A. Prasad Vinod, Himanshu Thapliyal, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Towards Photoplethysmogram Based Non-Invasive Blood Pressure Classification

Himanshu Thapliyal, Allison Caban-Holt, Rajdeep Kumar Nath, 2018, 2018 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS).

Evaluation of Wearable Head Set Devices in Older Adult Populations for Research

Himanshu Thapliyal, Hamid R. Arabnia, Allison Caban-Holt, 2015, 2015 International Conference on Computational Science and Computational Intelligence (CSCI).

Amazon Echo Enabled IoT Home Security System for Smart Home Environment

Carson Labrado, Himanshu Thapliyal, Ole Wendroth, 2018, 2018 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS).

2-Phase Energy-Efficient Secure Positive Feedback Adiabatic Logic for CPA-Resistant IoT Devices

Himanshu Thapliyal, Zachary Kahleifeh, H. Thapliyal, 2020, 2020 IEEE 6th World Forum on Internet of Things (WF-IoT).

An extension to DNA based Fredkin gate circuits: design of reversible sequential circuits using Fredkin gates

Himanshu Thapliyal, M. B. Srinivas, 2005, International Symposium on Optomechatronic Technologies.

FinSAL: FinFET-Based Secure Adiabatic Logic for Energy-Efficient and DPA Resistant IoT Devices

Himanshu Thapliyal, Azhar Mohammad, S. Dinesh Kumar, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.

VLSI Implementation of O(n*n) Sorting Algorithms And Their Hardware Comparison

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, CSC.

Design of a multilayer five-input majority gate and adder/subtractor circuits in NML computing

Carson Labrado, Himanshu Thapliyal, 2016 .

A Novel Parallel Multiply and Accumulate (V-MAC) Architecture Based on Ancient Indian Vedic Mathematics

Hamid R. Arabnia, Himanshu Thapliyal, 2004, ESA/VLSI.

Energy-recovery based hardware security primitives for low-power embedded devices

Himanshu Thapliyal, S. Dinesh Kumar, S. D. Kumar, 2018, 2018 IEEE International Conference on Consumer Electronics (ICCE).

Design of Testable Adder Circuits for Spintronics Based Nanomagnetic Computing

Ronald F. DeMara, Carson Labrado, Himanshu Thapliyal, 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.

Quantum circuit designs of carry lookahead adder optimized for T-count T-depth and qubits

Himanshu Thapliyal, Edgard Munoz-Coreas, Vladislav Khalus, 2020, Sustain. Comput. Informatics Syst..

QUALPUF: A Novel Quasi-Adiabatic Logic based Physical Unclonable Function

Himanshu Thapliyal, S. Dinesh Kumar, S. D. Kumar, 2016, CISRC.

PPG Based Continuous Blood Pressure Monitoring Framework for Smart Home Environment

Himanshu Thapliyal, Rajdeep Kumar Nath, H. Thapliyal, 2020, 2020 IEEE 6th World Forum on Internet of Things (WF-IoT).

Reversible Logic Synthesis of Half, Full and Parallel Subtractors

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, ESA.

The New BCD Subtractor and Its Reversible Logic Implementation

Himanshu Thapliyal, M. B. Srinivas, 2006, Asia-Pacific Computer Systems Architecture Conference.

Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications

Himanshu Thapliyal, Zachary Kahleifeh, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Quantum Circuit Design of a T-count Optimized Integer Multiplier

Himanshu Thapliyal, Edgard Muñoz-Coreas, H. Thapliyal, 2019, IEEE Transactions on Computers.

UTB-SOI based adiabatic computing for low-power and secure IoT devices

Himanshu Thapliyal, T. S. S. Varun, S. Dinesh Kumar, 2017, CISRC.

Design procedures and NML cost analysis of reversible barrel shifters optimizing garbage and ancilla lines

Ke Chen, Carson Labrado, Himanshu Thapliyal, 2016, The Journal of Supercomputing.

Resource Efficient Design of Quantum Circuits for Quantum Algorithms

Himanshu Thapliyal, H. Thapliyal, 2017 .

Design of Testable Reversible Sequential Circuits

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A new CRL gate as super class of Fredkin gate to design reversible quantum circuits

Himanshu Thapliyal, Nagarajan Ranganathan, Apeksha Bhatt, 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

Modified Montgomery modular multiplication using 4:2 compressor and CSA adder

Himanshu Thapliyal, M. B. Srinivas, Anvesh Ramasahayam, 2006, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06).

Efficient Circuit Design of Reversible Square

H. V. Jayashree, Himanshu Thapliyal, V. K. Agrawal, 2017, Trans. Comput. Sci..

Design of Quantum Circuits for Galois Field Squaring and Exponentiation

Himanshu Thapliyal, Edgard Muñoz-Coreas, H. Thapliyal, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Efficient reversible NOR gates and their mapping in optical computing domain

N. Ranganathan, Himanshu Thapliyal, Saurabh Kotiyal, 2014, Microelectron. J..

Partial Reversible Gates(PRG) for Reversible BCD Arithmetic

Hamid R. Arabnia, Himanshu Thapliyal, Rajnish Bajpai, 2007, CDES.

Efficient Reversible Logic Design of BCD Subtractors

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2009, Trans. Comput. Sci..

Reversible Logic Based Mapping of Quaternary Sequential Circuits Using QGFSOP Expression

Mozammel H. A. Khan, Himanshu Thapliyal, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

Design of a reversible bidirectional barrel shifter

Himanshu Thapliyal, Nagarajan Ranganathan, Saurabh Kotiyal, 2011, 2011 11th IEEE International Conference on Nanotechnology.

Design of majority logic based approximate arithmetic circuits

Fabrizio Lombardi, Carson Labrado, Himanshu Thapliyal, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Internet of Things-Based Consumer Electronics: Reviewing Existing Consumer Electronic Devices, Systems, and Platforms and Exploring New Research Paradigms

Himanshu Thapliyal, 2018, IEEE Consumer Electronics Magazine.

Ancilla-input and garbage-output optimized design of a reversible quantum integer multiplier

H. V. Jayashree, Hamid R. Arabnia, Himanshu Thapliyal, 2016, The Journal of Supercomputing.

Automatic synthesis of quaternary quantum circuits

Mozammel H. A. Khan, Himanshu Thapliyal, Edgard Muñoz-Coreas, 2017, The Journal of Supercomputing.

Concurrently testable FPGA design for molecular QCA using conservative reversible logic gate

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Novel NAND and AND Gate Using DNA Ligation and Two Transistors Implementations

Hamid R. Arabnia, Himanshu Thapliyal, Rajnish Bajpai, 2006, CDES.

Design Methodologies for Reversible Logic Based Barrel Shifters

Himanshu Thapliyal, Saurabh Kotiyal, H. Thapliyal, 2016, J. Circuits Syst. Comput..

Design of Novel Reversible Carry Look-Ahead BCD Subtractor

Himanshu Thapliyal, Sumedha K. Gupta, 2006, 9th International Conference on Information Technology (ICIT'06).

Exploration of Solar Cell Materials for Developing Novel PUFs in Cyber-Physical Systems

Carson Labrado, Himanshu Thapliyal, S. Dinesh Kumar, 2020, SN Computer Science.

Design of a reversible floating-point adder architecture

Himanshu Thapliyal, Nagarajan Ranganathan, Michael Nachtigal, 2011, 2011 11th IEEE International Conference on Nanotechnology.

An Integrated TRNG-PUF Architecture Based on Photovoltaic Solar Cells

Amit Degada, Himanshu Thapliyal, H. Thapliyal, 2021, IEEE Consumer Electronics Magazine.

FinSAL: A novel FinFET based Secure Adiabatic Logic for energy-efficient and DPA resistant IoT devices

Himanshu Thapliyal, S. Dinesh Kumar, Azhar Mohammad, 2016, 2016 IEEE International Conference on Rebooting Computing (ICRC).

Novel and Efficient 4: 2 and 5: 2 Compressors with Minimum Number of Transistors Designed for Low-Power Operations

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2006, ESA.

Post-Layout Simulation of Quasi-Adiabatic Logic Based Physical Unclonable Function

Himanshu Thapliyal, Hiroki Koyasu, Yasuhiro Takahashi, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

A High Speed Efficient N x N Bit Multiplier Based on Ancient Indian Vedic Mathematics

Himanshu Thapliyal, Vishal Verma, Vishal Verma, 2003, VLSI.

A Time-Area-Power Efficient Multiplier and Square Architecture Based on Ancient Indian Vedic Mathematics

Hamid R. Arabnia, Himanshu Thapliyal, 2004, ESA/VLSI.

Exploration of Non-Volatile MTJ/CMOS Circuits for DPA-Resistant Embedded Hardware

Himanshu Thapliyal, S. Dinesh Kumar, S. D. Kumar, 2019, IEEE Transactions on Magnetics.

On the design of quaternary arithmetic logic unit based on CNTFETs

Keivan Navi, Fazel Sharifi, Himanshu Thapliyal, 2019 .

Transactions on Computational Science XXIV

Marina L. Gavrilova, Himanshu Thapliyal, C. J. Kenneth Tan, 2014, Lecture Notes in Computer Science.

Design of Reversible Latches Optimized for Quantum Cost, Delay and Garbage Outputs

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2010, 2010 23rd International Conference on VLSI Design.

Energy-efficient magnetic 4-2 compressor

Fazel Sharifi, Himanshu Thapliyal, S. Dinesh Kumar, 2017, Microelectron. J..

High Speed Efficient N Bit by N Bit Division Algorithm and Architecture Based on Ancient Indian Vedic Mathematics

Hamid R. Arabnia, Himanshu Thapliyal, 2004, ESA/VLSI.

Novel Reversible `TSG' Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU

Himanshu Thapliyal, M. B. Srinivas, H. Thapliyal, 2005, 2005 5th International Conference on Information Communications & Signal Processing.

Design of a Piezoelectric-Based Physically Unclonable Function for IoT Security

Carson Labrado, Himanshu Thapliyal, H. Thapliyal, 2019, IEEE Internet of Things Journal.

Design for A Fast And Low Power 2's Complement Multiplier

Hamid R. Arabnia, Himanshu Thapliyal, M. B. Srinivas, 2005, CDES.

Quantum Circuit Designs of Integer Division Optimizing T-Count and T-Depth

Travis S. Humble, Himanshu Thapliyal, T. S. S. Varun, 2017, 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS).

Emerging Paradigms in Vehicular Cybersecurity

Stacy J. Prowell, Saraju P. Mohanty, Himanshu Thapliyal, 2019, IEEE Consumer Electron. Mag..

Hardware Security Primitives for Vehicles

Carson Labrado, Himanshu Thapliyal, H. Thapliyal, 2019, IEEE Consumer Electronics Magazine.

A new reversible design of BCD adder

N. Ranganathan, Himanshu Thapliyal, H. Thapliyal, 2011, 2011 Design, Automation & Test in Europe.

Heuristic Based Majority/Minority Logic Synthesis for Emerging Technologies

Vipul Kumar Mishra, Himanshu Thapliyal, H. Thapliyal, 2017, 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID).

Design exploration of a Symmetric Pass Gate Adiabatic Logic for energy-efficient and secure hardware

Himanshu Thapliyal, Kalyan S. Perumalla, S. Dinesh Kumar, 2017, Integr..

A Novel Reversible TSG Gate and Its Application for Designing Reversible Carry Look-Ahead and Other Adder Architectures

Himanshu Thapliyal, M. B. Srinivas, H. Thapliyal, 2005, Asia-Pacific Computer Systems Architecture Conference.

Smart Home System for Patients with Mild Cognitive Impairment

Himanshu Thapliyal, Allison Caban-Holt, Shane Robert Maynard, 2015, 2015 International Conference on Computational Science and Computational Intelligence (CSCI).

Progress in Reversible Processor Design: A Novel Methodology for Reversible Carry Look-Ahead Adder

H. V. Jayashree, Hamid R. Arabnia, Himanshu Thapliyal, 2013, Trans. Comput. Sci..

Consumer Technologies for Smart Cities to Smart Villages

Saraju P. Mohanty, Himanshu Thapliyal, Rajnish Bajpai, 2021, 2021 IEEE International Conference on Consumer Electronics (ICCE).

Low-Energy and CPA-Resistant Adiabatic CMOS/MTJ Logic for IoT Devices

Himanshu Thapliyal, Zachary Kahleifeh, H. Thapliyal, 2021, 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Consumer Technology-Based Solutions for COVID-19

Katina Michael, Saraju P. Mohanty, Himanshu Thapliyal, 2021, IEEE Consumer Electron. Mag..

Machine Learning-Based Anxiety Detection in Older Adults Using Wristband Sensors and Context Feature pdf

Himanshu Thapliyal, Rajdeep Kumar Nath, H. Thapliyal, 2021, SN Computer Science.

Smart Village: An IoT Based Digital Transformation

Saraju P. Mohanty, Amit Degada, Himanshu Thapliyal, 2021, 2021 IEEE 7th World Forum on Internet of Things (WF-IoT).

Machine Learning Based Stress Monitoring in Older Adults Using Wearable Sensors and Cortisol as Stress Biomarker

Himanshu Thapliyal, Allison Caban-Holt, Rajdeep Kumar Nath, 2021, Journal of Signal Processing Systems.

Novel Secure MTJ/CMOS Logic (SMCL) for Energy-Efficient and DPA-Resistant Design

Himanshu Thapliyal, S. Dinesh Kumar, Zachary Kahleifeh, 2021, SN Computer Science.

Exploring the Antecedents of Consumer Electronics IoT Devices Purchase Decision: A Mixed Methods Study

Debajyoti Pal, Himanshu Thapliyal, Vajirasak Vanijja, 2021, IEEE Transactions on Consumer Electronics.

Smart Wristband-Based Stress Detection Framework for Older Adults With Cortisol as Stress Biomarker

Himanshu Thapliyal, Rajdeep Kumar Nath, H. Thapliyal, 2021, IEEE Transactions on Consumer Electronics.

Physical Unclonable Function (PUF)-Based Sustainable Cybersecurity

Saraju P. Mohanty, Himanshu Thapliyal, H. Thapliyal, 2021, IEEE Consumer Electron. Mag..

Quantum Annealing for Automated Feature Selection in Stress Detection

Travis S. Humble, Himanshu Thapliyal, Rajdeep Kumar Nath, 2021, 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Humans in the Loop: Cybersecurity Aspects in the Consumer IoT Context

Debajyoti Pal, Suree Funilkul, Himanshu Thapliyal, 2021, IEEE Consumer Electronics Magazine.

Machine Learning Based Prediction of Future Stress Events in a Driving Scenario

Himanshu Thapliyal, Rajdeep Kumar Nath, Joseph Clark, 2021, 2021 IEEE 7th World Forum on Internet of Things (WF-IoT).

EE-ACML: Energy-Efficient Adiabatic CMOS/MTJ Logic for CPA-Resistant IoT Devices

Himanshu Thapliyal, Zachary Kahleifeh, H. Thapliyal, 2021, Sensors.

A Review of Machine Learning Classification Using Quantum Annealing for Real-World Applications

Travis S. Humble, Himanshu Thapliyal, Rajdeep Kumar Nath, 2021, SN Computer Science.

Wearable Health Monitoring System for Older Adults in a Smart Home Environment

Himanshu Thapliyal, Rajdeep Kumar Nath, H. Thapliyal, 2021, 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Approximate Adiabatic Logic for Low-Power and Secure Edge Computing

Himanshu Thapliyal, Wu Yang, 2022, IEEE Consumer Electronics Magazine.

2-SPGAL: 2-Phase Symmetric Pass Gate Adiabatic Logic for Energy-Efficient Secure Consumer IoT

Amit Degada, Himanshu Thapliyal, H. Thapliyal, 2021, 2021 IEEE International Conference on Consumer Electronics (ICCE).

Fortifying Vehicular Security Through Low Overhead Physically Unclonable Functions

Saraju P. Mohanty, Carson Labrado, Himanshu Thapliyal, 2021, ACM J. Emerg. Technol. Comput. Syst..

Quantum Circuit Design of Integer Division Optimizing Ancillary Qubits and T-Count

Himanshu Thapliyal, Edgard Munoz-Coreas, T. S. S. Varun, 2016, 1609.01241.

Wire crossing constrained QCA circuit design using bilayer logic decomposition

Ronald F. DeMara, Himanshu Thapliyal, Arman Roohi, 2015 .

Energy-Efficient Design of Hybrid MTJ/CMOS and MTJ/Nanoelectronics Circuits

Fazel Sharifi, Himanshu Thapliyal, S. D. Kumar, 2018, IEEE Transactions on Magnetics.