Ákos Zarándy

High performance processor array for image processing

Csaba Rekeczky, Péter Földesy, Ákos Zarándy, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Pixel-level APS Sensor Integration and Sensitivity Scaling for Vision Based Speed Measurement☆

Péter Földesy, Ákos Zarándy, Mate Nemeth, 2016 .

Cellular Multi-core Processor Carrier Chip for Nanoantenna Integration and Experiments

Wolfgang Porod, Ricardo Carmona, Péter Földesy, 2010 .

Per-pixel integration time controlled image sensor

Péter Földesy, Ákos Zarándy, Tamás Roska, 2005, Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005..

A 0.8 micrometer CMOS 2-D Programmable Mixed-Signal Focal-Plane Array Processor with On-Chip Binary Imaging and Instructions Storage

Ángel Rodríguez-Vázquez, Servando Espejo, Rafael Domínguez-Castro, 1997 .

VISCUBE: A multi-layer vision chip

Ángel Rodríguez-Vázquez, Ricardo Carmona-Galán, Gustavo Liñán Cembrano, 2011 .

Ultra-high frame rate focal plane image sensor and processor

Servando Espejo, Rafael Domínguez-Castro, Ákos Zarándy, 2002 .

A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage

Ángel Rodríguez-Vázquez, Tamás Roska, Servando Espejo, 1997, IEEE J. Solid State Circuits.

3D multi-layer vision architecture for surveillance and reconnaissance applications

Csaba Rekeczky, Ángel Rodríguez-Vázquez, Péter Földesy, 2009, 2009 European Conference on Circuit Theory and Design.

Cellular neural networks and cellular wave computers

Tamás Roska, Ákos Zarándy, Csaba Rekeczky, 2009 .