B. Fort

A Survey and Evaluation of FPGA High-Level Synthesis Tools

Yu Ting Chen, Fabrizio Ferrandi, Vlad Mihai Sima, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification

Samir Parikh, Lesley Shannon, Paul Chow, 2006, 2006 International Conference on Field Programmable Logic and Applications.