Vinicius Neves Possani

Exploring independent gates in FinFET-based transistor network generation

Felipe S. Marques, Leomar S. da Rosa, Renato P. Ribas, 2014, 2014 27th Symposium on Integrated Circuits and Systems Design (SBCCI).

Exact Multi-Level Benchmark Circuit Generation for Logic Synthesis Evaluation

Felipe S. Marranghello, Renato P. Ribas, André Inácio Reis, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Graph-Based Transistor Network Generation Method for Supergate Design

Leomar S. da Rosa, Renato P. Ribas, André Inácio Reis, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Efficient transistor-level design of CMOS gates

Leomar S. da Rosa, Renato P. Ribas, André Inácio Reis, 2013, GLSVLSI '13.

Binary adder circuit design using emerging MIGFET devices

Felipe S. Marranghello, Renato P. Ribas, André Inácio Reis, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

Performance evaluation of optimized transistor networks built using independent-gate FinFET

Felipe S. Marranghello, Renato P. Ribas, André Inácio Reis, 2016, 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS).

Improving the methodology to build non-series-parallel transistor arrangements

Felipe S. Marques, Leomar S. da Rosa, Renato P. Ribas, 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).

Unlocking Fine-Grain Parallelism for AIG Rewriting

Keshav Pingali, Alan Mishchenko, Renato P. Ribas, 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

NSP kernel finder - A methodology to find and to build non-series-parallel transistor arrangements

Felipe S. Marques, Leomar S. da Rosa, Renato P. Ribas, 2012, 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI).