H. Takenaka

A 0.5-/spl mu/m, 3-V 1T1C, 1-Mbit FRAM with a variable reference bit-line voltage scheme using a fatigue-free reference capacitor

S. Tanaka, S. Ohtsuki, Y. Itoh, 2000, IEEE Journal of Solid-State Circuits.

A sub-40 ns random-access chain FRAM architecture with a 768 cell-plate-line drive

Y. Oowaki, D. Takashima, S. Tanaka, 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

A low power GaAs front-end IC with current-reuse configuration using 0.15 /spl mu/m gate MODFETs

H. Koizumi, T. Tanaka, D. Ueda, 1997, 1997 IEEE MTT-S International Microwave Symposium Digest.

Low current wideband amplifier using 0.2 /spl mu/m gate MODFET fabricated by using phase-shift lithography

T. Tanaka, M. Nishitsuji, D. Ueda, 1996, GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996.