Shoji Shukuri

256 Mb DRAM technologies for file applications

Masashi Horiguchi, Takashi Nishida, Norio Hasegawa, 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A 1000 MIPS BiCMOS microprocessor with superscalar architecture

Makoto Suzuki, Kazuo Yano, Tadahiko Nishimukai, 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A 3.3 V high-density AND flash memory with 1 ms/512B erase and program time

Hiroshi Sato, Takayuki Kawahara, O. Sakamoto, 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

Material Representations and Algorithms for Nanometer Lithography Simulation (Special Issue on 1993 VLSI Process and Device Modeling Workshop (VPAD93))

Eiji Takeda, Taro Ogawa, Shoji Shukuri, 1994 .

256-Mb DRAM circuit technologies for file applications

Masashi Horiguchi, Takashi Nishida, Norio Hasegawa, 1993 .

A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit

Kazumasa Yanagisawa, Koichiro Ishibashi, Masanao Yamaoka, 2002 .