Tom Chen

发表

Integrated ADI optical metrology solution for lithography process control of CD and OV

Marlene Strobl, Wilhelm Tsai, Andy Lan, 2014, Advanced Lithography.

On single/dual-rail mixed PTL/static circuits in floating-body SOI and bulk CMOS: a comparative assessment

Tom Chen, Geun Rae Cho, 2003, 16th International Conference on VLSI Design, 2003. Proceedings..

System und verfahren zur bereitstellung von java-server-seiten-sicherheit

Tom Chen, Anthony Piccirilli, 2004 .

COBRA: a 100-MOPS single-chip programmable and expandable FFT

Tom Chen, Glen Sunada, Jain Jin, 1999, IEEE Trans. Very Large Scale Integr. Syst..

Design of a 50MΩ Transimpedance Amplifier with 0.98fa/vHz Input Inferred Noise in a 0.18µM CMOS Technology

Tom Chen, William Wilson, 2014, BIODEVICES.

RUBASTEM: a method for testing VHDL behavioral models

Anneliese Amschler Andrews, Tom Chen, Andrew O'Fallon, 2004, Eighth IEEE International Symposium on High Assurance Systems Engineering, 2004. Proceedings..

Power andPerformance Analysis for Early Design Space Exploration

Tom Chen, Charles Thangaraj, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

High quality behavioral verification using statistical stopping criteria

Anneliese Amschler Andrews, Tom Chen, Amjad Hajjar, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

Gate delay modeling with multiple input switching for static (statistical) timing analysis

Tom Chen, Jayashree Sridharan, Tom Chen, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

On CMOS Memory Design in Low Supply Voltage for Integrated Biosensor Applications

Tom Chen, Allen Chen, Ryan Hoppal, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

Multiple feature clustering for image sequence segmentation

Jinsang Kim, Tom Chen, 2001, Pattern Recognit. Lett..

Impact of on-chip inductance when transitioning from Al to Cu based technology

Tom Chen, 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

Design of a CMOS test chip for package models and I/O characteristics verification

Tom Chen, Chetan Despande, 2003, ASP-DAC '03.

Γ (Gamma): A SaaS-enabled fast and accurate analog design System

Tom Chen, Yishai Statter, 2016, Integr..

Manufacturing test simulator: a concurrent engineering tool for boards and MCMs

Tom Chen, Mick Tegethoff, 1994, Proceedings., International Test Conference.

Serving the global communications community

Tom Chen, 2006, IEEE Communications Magazine.

An ultra-large capacity single-chip memory architecture with self-testing and self-repairing

Tom Chen, Glen Sunada, 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

An expandable column fft architecture using circuit switching networks

Tom Chen, Li Zhu, Tom Chen, 1993, J. VLSI Signal Process..

Stability analysis of active clock deskewing systems using a control theoretic approach

Peter Young, Tom Chen, Vinil Varghese, 2005, ASP-DAC.

An accurate coverage forecasting model for behavioral model verification

Tom Chen, Amjad Hajjar, Tom Chen, 2002, Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002.

International Symposium on Quality Electronic Design

Daniela De Venuto, Tom Chen, D. Venuto, 2005, Microelectron. J..

VLSI Architecture for Real-Time Edge Linking

Tom Chen, Amjad Hajjar, 1999, IEEE Trans. Pattern Anal. Mach. Intell..

ASIC yield estimation at early design cycle

Tom Chen, Mick Tegethoff, Von-Kyoung Kim, 1996, Proceedings International Test Conference 1996. Test and Design Validity.

Design and implementation

Tom Chen, Tom Chen, Tom Chen, 2006, IEEE Commun. Mag..

A VLSI architecture for video-object segmentation

Jinsang Kim, Tom Chen, 2003, IEEE Trans. Circuits Syst. Video Technol..

A Self-Testing and Self-Repairing Structure for Ultra-Large Capacity Memories

Tom Chen, Glen Sunada, Tom Chen, 1992, Proceedings International Test Conference 1992.

Mixed. PTL/static logic synthesis using genetic algorithms for low-power applications

Tom Chen, Geun Rae Cho, Tom Chen, 2002, Proceedings International Symposium on Quality Electronic Design.

A CMOS delayed locked loop (DLL) for reducing clock skew to under 500 ps

Yong-Bin Kim, Tom Chen, 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

Systematic analysis of active clock deskewing systems using control theory

Tom Chen, Peter Michael Young, Vinil Varghese, 2005, Design, Automation and Test in Europe.

A Fast 1024-Point FFT Architecture

Tom Chen, Li Zhu, Tom Chen, 1991, ICPP.

Design of an integrated microelectrode array system for high spatiotemporal resolution chemical imaging

Tom Chen, Stacy Willett, Charles Henry, 2016, 2016 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Note from the editor-in-chief - Surveys

Tom Chen, 2006, IEEE Commun. Mag..

On statistical behavior of branch coverage in testing behavioral VHDL models

Anneliese Amschler Andrews, Tom Chen, Amjad Hajjar, 2000, Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786).

Rapid design space exploration using legacy design data and technology scaling trend

Tom Chen, Charles Thangaraj, Alkan Cengiz, 2010, Integr..

Stopping criteria comparison: towards high quality behavioral verification

Anneliese Amschler Andrews, Tom Chen, Amjad Hajjar, 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

On power and performance tradeoff of L2 cache compression

Tom Chen, Chandrika Jena, Tim Mason, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

A compact signal generation and acquisition circuit for electrochemical impedance spectroscopy

Tom Chen, Lang Yang, Lang Yang, 2016, 2016 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Database Interface Project Phase II

Tom Chen, Terence Lim, Tracy Anderson, 2003 .

A Rule-Based Software Testing Method for VHDL Models

Anneliese Amschler Andrews, Tom Chen, Andrew O'Fallon, 2003, VLSI-SOC.

Sensitivity Analysis of Critical Parameters in Board Test

Tom Chen, Mick Tegethoff, 1996, IEEE Des. Test Comput..

COBRA: an 1.2 million transistor expandable column FFT chip

Tom Chen, Glen Sunada, Jain Jin, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Synthesis-based design and implementation methodology of high-speed, high-performing unit: L2 cache unit design

Vikas Agarwal, Tom Chen, Chirag Desai, 2015, Integr..

Efficient Verification of Behavioral Models Using Sequential Sampling Technique

Anneliese Amschler Andrews, Tom Chen, Amjad Hajjar, 1999, VLSI.

Statistical timing analysis of coupled interconnects using quadratic delay-change characteristics

Tom Chen, Amjad Hajjar, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

RC Extraction of Interconnects at Sub-Wavelength Dimensions

Tom Chen, Mahir Aydin, John Pratt, 2005, Artificial Intelligence and Applications.

A new column on "very large projects" [Note from the Editor-in-Chief]

Tom Chen, 2007, IEEE Communications Magazine.

On comparing functional fault coverage and defect coverage for memory testing

Tom Chen, Von-Kyoung Kim, 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

On the Impact of Fanout Optimization and Redundant Buffer Removal for Mixed PTL Synthesis

Tom Chen, Geun Rae Cho, 2002, IWLS.

Building an intelligent tutoring system for procedural domains

Tom Chen, Larry Brandt, Andrew Warinner, 1990 .

Editorial

Daniela De Venuto, Tom Chen, 2007, Microelectron. J..

Modified rate-distortion function with optimal classification for wavelet coding

Chien-Chih Chen, Tom Chen, 1997, Proceedings of International Conference on Image Processing.

Looking back and ahead

Tom Chen, 2006, IEEE Communications Magazine.

Design of a self-testing and self-repairing structure for highly hierarchical ultra-large capacity memory chips

Tom Chen, Glen Sunada, Tom Chen, 1993, IEEE Trans. Very Large Scale Integr. Syst..

Maintenance policies with two-dimensional warranty

Tom Chen, Elmira Popova, 2002, Reliab. Eng. Syst. Saf..

Technical Subcommittees

Naehyuck Chang, Daniela De Venuto, Spyros Tragoudas, 2006, ISQED.

Fully CMOS-Compatible On-Chip Optical Clock Distribution and Recovery

Guangwei Yuan, Tom Chen, Kevin L. Lear, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Achieving the quality of verification for behavioral models with minimum effort

Anneliese Amschler Andrews, Tom Chen, Charles Anderson, 2000, Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525).

A Real-Time Edge Detector: Algorithm and VLSI Architecture

Tom Chen, Fahad M. Alzahrani, 1997, Real Time Imaging.

Analyzing statistical timing behavior of coupled interconnects using quadratic delay change characteristics

Tom Chen, Amjad Hajjar, 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

A 2nd Order CMOS Sigma-Delta Modulator Design Suitable for Low-Power Biosensor Applications

Tom Chen, Ryan Selby, 2013, BIOSTEC.

A practical automated timing and physical design implementation methodology for the synchronous asynchronous interface and multi-voltage domain in high-speed synthesis

Tom Chen, Mozammel Hossain, John Badar, 2016, Microprocess. Microsystems.

Proposing a feature topic

Tom Chen, 2006, IEEE Communications Magazine.

A sensitivity based approach to analyzing signal delay uncertainty of coupled interconnects

Tom Chen, Medha Kulkarni, 2004, International Symposium on Signals, Circuits and Systems. Proceedings, SCS 2003. (Cat. No.03EX720).

Design of CMOS IO drivers with less sensitivity to process, voltage, and temperature variations

Tom Chen, Gerald Esch, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.

How much testing is enough? Applying stopping rules to behavioral model testing

Anneliese Amschler Andrews, Tom Chen, Charles Anderson, 1999, Proceedings 4th IEEE International Symposium on High-Assurance Systems Engineering.

DISTRIBUTED COLLISION DETECTION AND RESOLUTION

Tom Chen, Ching Ling, Ching Ling, 2010 .

Design target exploration for meeting time-to-market using pareto analysis

Tom Chen, Charles Thangaraj, 2008, 2008 IEEE International Symposium on Circuits and Systems.

An efficient multi channel, 425µW QPSK transmitter with tuning for process variation in the Medical Implantable Communications Service (MICS) band of 402–405MHz

Tom Chen, Abhiram Reddy Gundla, 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Simulation Techniques for the Manufacturing Test of MCMs

Tom Chen, Mick Tegethoff, 1997, J. Electron. Test..

Fast antirandom (FAR) test generation

Anneliese Amschler Andrews, Tom Chen, Charles Anderson, 1998, Proceedings Third IEEE International High-Assurance Systems Engineering Symposium (Cat. No.98EX231).

Fast Evaluation of Analog Circuits Using Linear Programming

Tom Chen, Allen Chen, Ryan Hoppal, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Reader feedback loop

Tom Chen, 2006, IEEE Communications Magazine.

Security Products (Security Pro) Transition Analysis Facility (STAF): Pragmatic concepts for MLS technology transition

Tom Chen, Christine Arangio, Steve Neidhardt, 1992, [1992] Proceedings Eighth Annual Computer Security Application Conference.

Performance driven decoupling capacitor allocation considering data and clock interactions

Tom Chen, Ajith Chandy, 2005, Design, Automation and Test in Europe.

Early Design Phase Power Performance Trade-Offs Using In-Situ Macro Models

Tom Chen, Charles Thangaraj, 2008, 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008).

Near-linear CMOS I/O driver with less sensitivity to process, voltage, and temperature variations

Tom Chen, Gerald Esch, 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Joint penalized spline modeling of multivariate longitudinal data, with application to HIV-1 RNA load levels and CD4 cell counts.

Rui Wang, Tom Chen, Lihui Zhao, 2020, Biometrics.

Assessing defect coverage of memory testing algorithms

Tom Chen, Von-Kyoung Kim, 1999, Proceedings Ninth Great Lakes Symposium on VLSI.

On choosing test criteria for behavioral level hardware design verification

Anneliese Amschler Andrews, Tom Chen, Chuck Anderson, 2000, Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786).

Fast Anti-Random (FAR) Test Generation to Improve the Quality of Behavioral Model Verification

Anneliese Amschler Andrews, Tom Chen, Charles Anderson, 2002, J. Electron. Test..

Modeling multiple input switching of CMOS gates in DSM technology using HDMR

Tom Chen, Jayashree Sridharan, Tom Chen, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Segmentation of image sequences using SOFM networks

Jinsang Kim, Tom Chen, 2000, Proceedings 15th International Conference on Pattern Recognition. ICPR-2000.

Improving the efficiency and quality of simulation-based behavioral model verification using dynamic Bayesian criteria

Tom Chen, Amjad Hajjar, Tom Chen, 2002, Proceedings International Symposium on Quality Electronic Design.

Creating virtual environments over the Internet

Peter Young, Tom Chen, Shojiro Nagata, 1998, Electronic Imaging.

On the impact of technology scaling on mixed PTL/static circuits

Tom Chen, Geun Rae Cho, 2002, Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors.

A novel high-throughput method for table look-up based analog design automation

Tom Chen, Yishai Statter, 2016, Integr..

Real-time Video Objects Segmentation using a Highly Pipelined Microarchitecture

Jinsang Kim, Tom Chen, 2001, VIIP.

A sensitivity-based approach to analyzing signal delay uncertainty of coupled interconnects

Tom Chen, Medha Kulkarni, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Defects, fault coverage, yield and cost, in board manufacturing

Tom Chen, Mick Tegethoff, 1994, Proceedings., International Test Conference.

A real-time high performance edge detector for computer vision applications

Tom Chen, Fahad M. Alzahrani, 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

A Low Power 15-Bit Decimator in 0.18um CMOS for Biomedical Applications

Tom Chen, Kristin Scholfield, 2013, 2013 Euromicro Conference on Digital System Design.

From ICC 2007 [Note from the Editor-in-Chief]

Tom Chen, 2007, IEEE Communications Magazine.

Aerobic colony count assessment on projector remote controls at BCIT major classrooms

Tom Chen, Tom Chen, 2018 .

Comparative assessment of adaptive body-bias SOI pass-transistor logic

Tom Chen, Geun Rae Cho, 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

On Mixed PTL/Static Logic for Low-power and High-speed Circuits

Tom Chen, Geun Rae Cho, 2001, VLSI Design.

Fault coverage estimation for early stage of VLSI design

Tom Chen, Mick Tegethoff, Von-Kyoung Kim, 1999, Proceedings Ninth Great Lakes Symposium on VLSI.

A CMOS Temperature Sensor with -0.34°C to 0.27°C Inaccuracy from -30°C to 80°C

Tom Chen, Hai Chi, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

Synthesis of single/dual-rail mixed PTL/static logic for low-power applications

Tom Chen, Geun Rae Cho, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Assessing neural networks as guides for testing activities

Anneliese Amschler Andrews, Tom Chen, Charles Anderson, 1996, Proceedings of the 3rd International Software Metrics Symposium.

A handheld electrochemical sensing platform for point-of-care diagnostic applications

Tom Chen, Lang Yang, 2017, 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Appeal to Industry

Tom Chen, 2006, IEEE Communications Magazine.

A 0.18µm CMOS 2nd Order Sigma-Delta Modulator for Low-power Biosensor Applications

Tom Chen, Ryan Selby, 2013, BIODEVICES.

A VLSI architecture for image sequence segmentation using edge fusion

Jinsang Kim, Tom Chen, 2000, Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception.

Android - Collusion Conspiracy

Tom Chen, Jorge Blasco, Igor Muttik, 2015 .

ASIC manufacturing test cost prediction at early design stage

Tom Chen, Mick Tegethoff, Von-Kyoung Kim, 1997, Proceedings International Test Conference 1997.