Michiko Inoue

发表

Non-scan Design for Single-Port-Change Delay Fault Testability

Hideo Fujiwara, Yuki Yoshikawa, Satoshi Ohtake, 2006 .

Short Paper: Tight Bounds for Universal and Cautious Self-stabilizing 1-Maximal Matching

Sébastien Tixeuil, Michiko Inoue, 2018, NETYS.

An extended class of sequential circuits with combinational test generation complexity

Hideo Fujiwara, Michiko Inoue, Chikateru Jinno, 2002, Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors.

A class of sequential circuits with combinational test generation complexity under single-fault assumption

Hideo Fujiwara, Michiko Inoue, Emil Gizdarski, 2000, Proceedings of the Ninth Asian Test Symposium.

Clustering algorithms in ad hoc networks

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2005 .

Mutual Exclusion Algorithm with Skipping Arbitration Tree

Hideo Fujiwara, Michiko Inoue, Tsuyoshi Susuki, 2009 .

An Efficient Silent Self-stabilizing 1-Maximal Matching Algorithm Under Distributed Daemon for Arbitrary Networks

Sébastien Tixeuil, Fukuhito Ooshita, Michiko Inoue, 2017, SSS.

Variation-Aware Hardware Trojan Detection through Power Side-channel

Alex Orailoglu, Michiko Inoue, Fakir Sharif Hossain, 2018, 2018 IEEE International Test Conference (ITC).

DART—A Concept of In-field Testing for Enhancing System Dependability

Kazumi Hatayama, Tomokazu Yoneda, Yukiya Miura, 2019 .

Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, 2020, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A layout adjustment problem for disjoint rectangles preserving orthogonal order

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1998, Systems and Computers in Japan.

A Low Power Deterministic Test Using Scan Chain Disable Technique

Hideo Fujiwara, Tsuyoshi Iwagaki, Michiko Inoue, 2006, IEICE Trans. Inf. Syst..

A parallel algorithm for weighted distance transforms

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1997, Proceedings 11th International Parallel Processing Symposium.

Memory block based scan-BIST architecture for application-dependent FPGA testing

Kazumi Hatayama, Tomokazu Yoneda, Michiko Inoue, 2014, FPGA.

Design for Testability Method to Avoid Error Masking of Software-Based Self-Test for Processors

Hideo Fujiwara, Satoshi Ohtake, Michiko Inoue, 2008, IEICE Trans. Inf. Syst..

Decimal Multiplication Using Combination of Software and Hardware

Michiko Inoue, Michihiro Shintani, Mian Riaz-ul-haque, 2018, 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Title Cost optimal parallel algorithms for $P$-complete problems (Algorithm Engineering as a New Paradigm)

Toshimitsu Masuzawa, Michiko Inoue, Akihiro Fujiwara, 2001 .

Cycle-Accurate Evaluation of Software-Hardware Co-Design of Decimal Computation in RISC-V Ecosystem

Michiko Inoue, Michihiro Shintani, Riaz-ul-haque Mian, 2019, 2019 32nd IEEE International System-on-Chip Conference (SOCC).

Faster-than-at-speed test for increased test quality and in-field reliability

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2011, 2011 IEEE International Test Conference.

COM(Cost Oriented Memory) Testing

Michiko Inoue, Akihiro Fujiwara, T. Yamada, 1992, Proceedings International Test Conference 1992.

Capture in Turn Scan for Reduction of Test Data Volume, Test Application Time and Test Power

Hideo Fujiwara, Michiko Inoue, Jishun Kuang, 2010, 2010 19th IEEE Asian Test Symposium.

A causal broadcast protocol for distributed mobile systems

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2001 .

Byzantine-Tolerant Gathering of Mobile Agents in Arbitrary Networks with Authenticated Whiteboards

Fukuhito Ooshita, Michiko Inoue, Masashi Tsuchida, 2018, IEICE Trans. Inf. Syst..

Instruction-based delay fault self-testing of pipelined processor cores

Hideo Fujiwara, Kewal K. Saluja, Virendra Singh, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Parallel algorithms for all nearest neighbors of binary images on the BSP model

Toshimitsu Masuzawa, Michiko Inoue, Akihiro Fujiwara, 1999, Proceedings Fourth International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN'99).

Partial Scan Approach for Secret Information Protection

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2009, 2009 14th IEEE European Test Symposium.

Accurate Recycled FPGA Detection Using an Exhaustive-Fingerprinting Technique Assisted by WID Process Variation Modeling

Michihiro Shintani, Michiko Inoue, Foisal Ahmed, 2020 .

DART: Dependable VLSI test architecture and its implementation

Motoyuki Sato, Kotaro Shimamura, Kazumi Hatayama, 2012, 2012 IEEE International Test Conference.

Reliability enhancement of embedded memory with combination of aging-aware adaptive in-field self-repair and ECC

Tomokazu Yoneda, Michiko Inoue, Yuta Yamato, 2016, 2016 21th IEEE European Test Symposium (ETS).

A method of test generation for weakly testable data paths using test knowledge extracted from RTL description

Hideo Fujiwara, Satoshi Ohtake, Michiko Inoue, 1999, Proceedings Eighth Asian Test Symposium (ATS'99).

Efficient Constraint Extraction for Template-Based Processor Self-Test Generation

Hideo Fujiwara, Tsuyoshi Iwagaki, Michiko Inoue, 2005, 14th Asian Test Symposium (ATS'05).

Detecting hardware Trojans without a Golden IC through clock-tree defined circuit partitions

Alex Orailoglu, Tomokazu Yoneda, Michiko Inoue, 2017, 2017 22nd IEEE European Test Symposium (ETS).

Black Hole Search Despite Byzantine Agents

Fukuhito Ooshita, Michiko Inoue, Masashi Tsuchida, 2019, SSS.

Aging test strategy and adaptive test scheduling for SoC failure prediction

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2010, 2010 IEEE 16th International On-Line Testing Symposium.

Fault-Tolerant and Self-Stabilizing Protocols Using an Unreliable Failure Detector

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2000 .

A causal broadcast protocol for distributed mobile systems

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2001, Systems and Computers in Japan.

Instruction-Based Self-Testing of Delay Faults in Pipelined Processors

Hideo Fujiwara, Kewal K. Saluja, Virendra Singh, 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Brief Announcement: Efficient Self-Stabilizing 1-Maximal Matching Algorithm for Arbitrary Networks

Sébastien Tixeuil, Fukuhito Ooshita, Michiko Inoue, 2017, PODC.

Artificial Neural Network Based Test Escape Screening Using Generative Model

Yoshiyuki Nakamura, Michiko Inoue, Michihiro Shintani, 2018, 2018 IEEE International Test Conference (ITC).

Non-scan design for testable data paths using thru operation

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

Parallelizability of Some P-Complete Problems

Toshimitsu Masuzawa, Michiko Inoue, Akihiro Fujiwara, 2000, IPDPS Workshops.

Test pattern selection to optimize delay test quality with a limited size of test set

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2010, 2010 15th IEEE European Test Symposium.

Optimal Wait-Free Clock Synchronisation Protocol on a Shared-Memory Multi-processor System

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1997, WDAG.

Non-scan design for testable data paths using thru operation

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1997, Asia and South Pacific Design Automation Conference.

A Scan-Based On-Line Aging Monitoring Scheme

Tomokazu Yoneda, Michiko Inoue, Hyunbean Yi, 2014 .

Balanced Secure Scan: Partial Scan Approach for Secret Information Protection

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2011, J. Electron. Test..

Uniform Bipartition in the Population Protocol Model with Arbitrary Communication Graphs

Fukuhito Ooshita, Michiko Inoue, S'ebastien Tixeuil, 2020, OPODIS.

Software-based delay fault testing of processor cores

Hideo Fujiwara, Kewal K. Saluja, Virendra Singh, 2003, 2003 Test Symposium.

Efficient Linearizable Implementation of Shared FIFO Queues and General Objects on a Distributed System(Special Section on Discrete Mathematics and Its Applications)

Toshimitsu Masuzawa, Nobuki Tokura, Michiko Inoue, 1998 .

A DFT Method with Embedded Test Plans for RTL Circuits

Michiko Inoue, Hiroyuki Okamoto, Hideo Fujiwara, 2002 .

A cost optimal parallel algorithm for weighted distance transforms

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1999, Parallel Comput..

Reliability-Enhanced ECC-Based Memory Architecture Using In-Field Self-Repair

Tomokazu Yoneda, Michiko Inoue, Yuta Yamato, 2016, IEICE Trans. Inf. Syst..

Constant-Space Population Protocols for Uniform Bipartition

Fukuhito Ooshita, Michiko Inoue, Ken-ichi Yamaguchi, 2017, OPODIS.

An ECC-based memory architecture with online self-repair capabilities for reliability enhancement

Tomokazu Yoneda, Michiko Inoue, Yuta Yamato, 2015, 2015 20th IEEE European Test Symposium (ETS).

Highly Reliable Memory Architecture Using Adaptive Combination of Proactive Aging-Aware In-Field Self-Repair and ECC

Michiko Inoue, Yasuo Sato, Gian Mayuga, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Efficient Implementation of Atomic Snapshot Object on Shared Memory Distributed System

Wei Chen, Toshimitsu Masuzawa, Michiko Inoue, 1994 .

A fast and accurate per-cell dynamic IR-drop estimation method for at-speed scan test pattern validation

Kazumi Hatayama, Tomokazu Yoneda, Michiko Inoue, 2012, 2012 IEEE International Test Conference.

Comparison of the Accuracy of Defect Detection in a Simple Task of Label Inspection –Investigation of the Number of Training Samples for Deep Learning to Be Equivalent to Human Visual Capability–

Naoto Kato, Michiko Inoue, Yoshio Iwai, 2020 .

Parallel selection algorithms with analysis on clusters

Toshimitsu Masuzawa, Michiko Inoue, Akihiro Fujiwara, 1999, Proceedings Fourth International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN'99).

An Efficient Silent Self-Stabilizing Algorithm to Solve 1-Maximal Matching in Anonymous Networks (ディペンダブルコンピューティング)

Michiko Inoue, Yuma Asada, 2014 .

A layout adjustment problem for disjoint rectangles preserving orthogonal order

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2002, Systems and Computers in Japan.

An Efficient Silent Self-Stabilizing 1-Maximal Matching Algorithm in Anonymous Networks

Fukuhito Ooshita, Michiko Inoue, Yuma Asada, 2016, J. Graph Algorithms Appl..

Special Section on Test and Verification of VLSIs

Michiko Inoue, Seiji Kajihara, 2008, IEICE Trans. Inf. Syst..

Ring Exploration of Myopic Luminous Robots with Visibility More Than One

Fukuhito Ooshita, Michiko Inoue, Shota Nagahama, 2019, SSS.

Space-Optimal Population Protocols for Uniform Bipartition Under Global Fairness

Fukuhito Ooshita, Michiko Inoue, Ken-ichi Yamaguchi, 2019, IEICE Trans. Inf. Syst..

Instruction-based delay fault self-testing of processor cores

Hideo Fujiwara, Kewal K. Saluja, Virendra Singh, 2004, 17th International Conference on VLSI Design. Proceedings..

Gender- and speaker-independent prediction of vocalic lip shapes using acoustic cues

Michiko Inoue, 2003 .

An approach to test synthesis from higher level

Hideo Fujiwara, Michiko Inoue, H. Fujiwara, 1998, Integr..

Efficient Mutual Exclusion Algorithm for High System Congestion

Hideo Fujiwara, Michiko Inoue, Tsuyoshi Suzuki, 2009 .

LBIST-PUF: An LBIST Scheme Towards Efficient Challenge-Response Pairs Collection and Machine-Learning Attack Tolerance Improvement

Michihiro Shintani, Michiko Inoue, Tomoki Mino, 2020, 2020 IEEE 29th Asian Test Symposium (ATS).

SelfStabilizing WaitFree Clock Synchronization with Bounded Space

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1998, OPODIS.

Seed Ordering and Selection for High Quality Delay Test

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2010, 2010 19th IEEE Asian Test Symposium.

Area-Efficient and Reliable Error Correcting Code Circuit Based on Hybrid CMOS/Memristor Circuit

Michihiro Shintani, Michiko Inoue, Mamoru Ishizaka, 2020, Journal of Electronic Testing.

Intra-Die-Variation-Aware Side Channel Analysis for Hardware Trojan Detection

Alex Orailoglu, Tomokazu Yoneda, Michiko Inoue, 2017, 2017 IEEE 26th Asian Test Symposium (ATS).

Parallel algorithms for selection on the BSP and BSP* models

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2002, Systems and Computers in Japan.

Design for Testability Based on Single-Port-Change Delay Testing for Data Paths

Hideo Fujiwara, Yuki Yoshikawa, Satoshi Ohtake, 2005, 14th Asian Test Symposium (ATS'05).

Measurement of BTI-induced Threshold Voltage Shift for Power MOSFETs under Switching Operation

Michihiro Shintani, Michiko Inoue, Takashi Sato, 2020, 2020 IEEE 29th Asian Test Symposium (ATS).

A Simple Parallel Algorithm for the Medial Axis Transform (Special Issue on Architectures Algorithms and Networks for Massively parallel Computing)

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1996 .

Comparing the Recognition Accuracy of Humans and Deep Learning on a Simple Visual Inspection Task

Naoto Katoh, Masashi Nishiyama, Michiko Inoue, 2019, ACPR.

Area-Efficient and Reliable Hybrid CMOS/Memristor ECC Circuit for ReRAM Storage

Michiko Inoue, Michihiro Shintani, Mamoru Ishizaka, 2018, 2018 IEEE 27th Asian Test Symposium (ATS).

Theorems for Separable Primary Input Faults in Internally Balanced Structures

Hideo Fujiwara, Michiko Inoue, Emil Gizdarski, 2000 .

An Efficient Silent Self-Stabilizing Algorithm for 1-Maximal Matching in Anonymous Networks

Michiko Inoue, Yuma Asada, 2015, WALCOM.

Efficient template generation for instruction-based self-test of processor cores

Hideo Fujiwara, Michiko Inoue, Kazuko Kambe, 2004, 13th Asian Test Symposium.

Parallel Algorithms for the All Nearest Neighbors of Binary Image on the BSP Model

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2000 .

Wait-Free Linearizable Implementation of a Distributed Shared Memory (Algorithm Engineering as a New Paradigm)

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1999 .

Test Pattern Ordering and Selection for High Quality Test Set under Constraints

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2012, IEICE Trans. Inf. Syst..

Power-Constrained Test Synthesis and Scheduling Algorithms for Non-Scan BIST-able RTL Data Paths

Hideo Fujiwara, Michiko Inoue, Jacob Savir, 2005, IEICE Trans. Inf. Syst..

Sequential Circuits with Combinational Test Generation Complexity under Single-Fault Assumption

Hideo Fujiwara, Michiko Inoue, Emil Gizdarski, 2002, J. Electron. Test..

Power-constrained DFT algorithms for non-scan BIST-able RTL data paths

Hideo Fujiwara, Michiko Inoue, Jacob Savir, 2004, 13th Asian Test Symposium.

Gender Classification using the Gaze Distributions of Observers on Privacy-protected Training Images

Masashi Nishiyama, Michiko Inoue, Yoshio Iwai, 2020, VISIGRAPP.

Temperature-Variation-Aware Test Pattern Optimization

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2011, 2011 Sixteenth IEEE European Test Symposium.

A snapshot algorithm for distributed mobile systems

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1996, Proceedings of 16th International Conference on Distributed Computing Systems.

Testing superscalar processors in functional mode

Hideo Fujiwara, Kewal K. Saluja, Virendra Singh, 2005, International Conference on Field Programmable Logic and Applications, 2005..

A Population Protocol for Uniform k-Partition Under Global Fairness

Fukuhito Ooshita, Michiko Inoue, Taisuke Izumi, 2018, 2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

High-Level Synthesis for Weakly Testable Data Paths

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1998 .

2015 JETTA Reviewers

Robert Wille, Yong-Bin Kim, Alexandre M. Amory, 2016, Journal of electronic testing.

Uniform Partition in Population Protocol Model under Weak Fairness

Fukuhito Ooshita, Michiko Inoue, Hiroto Yasumi, 2019, OPODIS.

Hierarchical BIST: Test‐per‐clock BIST with low overhead

Hideo Fujiwara, Michiko Inoue, Kenichi Yamaguchi, 2007 .

Gathering with a strong team in weakly Byzantine environments

Fukuhito Ooshita, Michiko Inoue, Junya Nakamura, 2021, ICDCN.

An Efficient Silent Self-stabilizing 1-Maximal Matching Algorithm Under Distributed Daemon Without Global Identifiers

Sébastien Tixeuil, Fukuhito Ooshita, Michiko Inoue, 2016, SSS.

Efficient and effective test program generation for software-based self-test of pipelined processors

Hideo Fujiwara, Michiko Inoue, Shinya Yokoyama, 2006 .

Classification of Trojan Nets Based on SCOAP Values using Supervised Learning

Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Bipartite Full Scan Design: A DFT Method for Asynchronous Circuits

Hideo Fujiwara, Satoshi Ohtake, Michiko Inoue, 2010, 2010 19th IEEE Asian Test Symposium.

An integrated DFT solution for power reduction in scan test applications by low power gating scan cell

Chia Yee Ooi, Tomokazu Yoneda, Michiko Inoue, 2017, Integr..

An effective scan segmentation approach to detect hardware Trojan in integrated circuits

Michiko Inoue, Fakir Sharif Hossain, Tomakazu Yoneda, 2015, 2015 IEEE International WIE Conference on Electrical and Computer Engineering (WIECON-ECE).

Evaluating Effects of Hand Pointing by an Image-Based Avatar of a Navigation System

Masashi Nishiyama, Michiko Inoue, Yoshio Iwai, 2018, HCI.

Linear-Time Snapshot Using Multi-writer Multi-reader Registers

Wei Chen, Michiko Inoue, Wei Chen, 1994, WDAG.

Test synthesis for datapaths using datapath-controller functions

Hideo Fujiwara, Kazuhiro Suzuki, Michiko Inoue, 2003, 2003 Test Symposium.

Delay Fault Testing of Processor Cores in Functional Mode

Hideo Fujiwara, Kewal K. Saluja, Virendra Singh, 2005, IEICE Trans. Inf. Syst..

A Population Protocol for Uniform $k$-partition under Global Fairness

Fukuhito Ooshita, Michiko Inoue, Taisuke Izumi, 2019 .

Adaptive Long-Lived O(k2)-Renaming with O(k2) Steps

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 2001, DISC.

A Failure Prediction Strategy for Transistor Aging

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Reliability of ECC-based Memory Architectures with Online Self-repair Capabilities (ディペンダブルコンピューティング)

Tomokazu Yoneda, Michiko Inoue, Yuta Yamato, 2014 .

Program-Based Delay Fault Self-Testing of Processor Cores (デザインガイア2003--VLSI設計の新しい大地を考える研究会)

Virendra Singh, Michiko Inoue, Hideo Fujiwara, 2003 .

D-10-18 An Approach to Temperature Control During VLSI Test

Hideo Fujiwara, Tomokazu Yoneda, Satoshi Ohtake, 2009 .

Parallel Path Delay Fault Simulation for Multi/Many-Core Processors with SIMD Units

Kazumi Hatayama, Tomokazu Yoneda, Michiko Inoue, 2014, 2014 IEEE 23rd Asian Test Symposium.

A high-level synthesis method for weakly testable data paths

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1998, Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259).

Gathering of Mobile Agents in Asynchronous Byzantine Environments with Authenticated Whiteboards

Fukuhito Ooshita, Michiko Inoue, Masashi Tsuchida, 2018, NETYS.

Brief Announcement: Acceleration by Contention for Shared Memory Mutual Exclusion Algorithms

Hideo Fujiwara, Michiko Inoue, Tsuyoshi Suzuki, 2009, DISC.

Byzantine Gathering in Networks with Authenticated Whiteboards

Fukuhito Ooshita, Michiko Inoue, Masashi Tsuchida, 2017, WALCOM.

Software-based delay fault self-testing of pipelined processor cores

Kewal K. Saluja, Virendra Singh, Michiko Inoue, 2004 .

An Effective and Sensitive Scan Segmentation Technique for Detecting Hardware Trojan

Tomokazu Yoneda, Michiko Inoue, Fakir Sharif Hossain, 2017, IEICE Trans. Inf. Syst..

Eventually consistent distributed ledger despite degraded atomic broadcast

Fukuhito Ooshita, Michiko Inoue, Grégory Bénassy, 2021, Concurr. Comput. Pract. Exp..

Unsupervised Recycled FPGA Detection Based on Direct Density Ratio Estimation

Michiko Inoue, Michihiro Shintani, Foisal Ahmed, 2021, 2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Wafer-level Variation Modeling for Multi-site RF IC Testing via Hierarchical Gaussian Process

Michiko Inoue, Michihiro Shintani, Riaz-Ul-Haque Mian, 2021, 2021 IEEE International Test Conference (ITC).

Hardware-Software Co-Design for Decimal Multiplication

Michiko Inoue, Michihiro Shintani, Riaz-ul-haque Mian, 2021, Comput..

Uniform bipartition in the population protocol model with arbitrary graphs

Sébastien Tixeuil, Fukuhito Ooshita, Michiko Inoue, 2021, Theoretical Computer Science.

Terminating Grid Exploration with Myopic Luminous Robots

Fukuhito Ooshita, Michiko Inoue, Shota Nagahama, 2021, 2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Robust Fault-Tolerant Design Based on Checksum and On-Line Testing for Memristor Neural Network

Michiko Inoue, Michihiro Shintani, Mamoru Ishizaka, 2021, 2021 IEEE 30th Asian Test Symposium (ATS).

Population Protocols for Graph Class Identification Problems pdf

Fukuhito Ooshita, Michiko Inoue, Hiroto Yasumi, 2021, ArXiv.

On the Non-scan BIST Schemes under Power Constraints for RTL Data Paths

Hideo Fujiwara, Michiko Inoue, Zhiqiang You, 2003 .

Non-scan design for testable data paths using thru operation

Toshimitsu Masuzawa, Hideo Fujiwara, Michiko Inoue, 1997 .

Faster-ThanAt-Speed Test for Increased Test Quality and InField Reliability

Hideo Fujiwara, Tomokazu Yoneda, Michiko Inoue, 2015 .

A Silent Self-Stabilizing Algorithm for 1-Maximal Matching in Anonymous Networks

Michiko Inoue, Yuma Asada, 2014 .