Yukio Miyasaka

Synthesis of Algorithm Considering Communication Structure of Distributed/Parallel Computing

Masahiro Fujita, Yukio Miyasaka, Ashish Mittal, 2019, 20th International Symposium on Quality Electronic Design (ISQED).

Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization pdf

Azadeh Davoodi, Zhiru Zhang, Sergio Bampi, 2020, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Synthesis and Generalization of Parallel Algorithm for Matrix-vector Multiplication

Yukio Miyasaka, Masahiro Fujita, Akihiro Goda, 2020, IPSJ Trans. Syst. LSI Des. Methodol..

Synthesis and Optimization of Multiple Portions of Circuits for ECO based on Set-Covering and QBF Formulations

Yukio Miyasaka, Amir Masoud Gharehbaghi, Masahiro Fujita, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Live Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints

Yukio Miyasaka, Amir Masoud Gharehbaghi, Masahiro Fujita, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Synthesis and Generalization of Parallel Algorithms Considering Communication Constraints

Masahiro Fujita, Yukio Miyasaka, Amir Masoud Gharehbaghi, 2020, 2020 21st International Symposium on Quality Electronic Design (ISQED).

Logic Synthesis for Generalization and Learning Addition

Masahiro Fujita, Yukio Miyasaka, Mingfei Yu, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Simple BDD Package without Variable Reordering and Its Application to Logic Optimization with Permissible Functions

Masahiro Fujita, Alan Mishchenko, Yukio Miyasaka, 2019 .