Hiroshi Fuketa

发表

Trade-off analysis between timing error rate and power dissipation for adaptive speed control with timing error prediction

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2009, 2009 Asia and South Pacific Design Automation Conference.

92% start-up time reduction by variation-tolerant chirp injection (CI) and negative resistance booster (NRB) in 39MHz crystal oscillator

Takayasu Sakurai, Hiroshi Fuketa, Shunta Iguchi, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

On-chip buck converter with spiral ferrite inductor and reducing IR drop in 3D stacked integration

Takayasu Sakurai, Hiroshi Fuketa, Koichi Ishida, 2014, 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE ASIA).

Device-circuit interactions in extremely low voltage CMOS designs (invited)

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2011, 2011 International Electron Devices Meeting.

Variation-aware subthreshold logic circuit design

Takayasu Sakurai, Hiroshi Fuketa, Ryo Takahashi, 2013, 2013 IEEE 10th International Conference on ASIC.

Flexible, large-area, and distributed organic electronics closely contacted with skin for healthcare applications

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

Wireless Power Transfer With Zero-Phase-Difference Capacitance Control

Takayasu Sakurai, Hiroshi Fuketa, Koichi Ishida, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Analog-Assisted Digital Low Dropout Regulator (AAD-LDO) with 59% Faster Transient Response and 28% Ripple Reduction

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2013 .

A 0.3-V 1- $\mu \text{W}$ Super-Regenerative Ultrasound Wake-Up Receiver With Power Scalability

Hiroshi Fuketa, Takashi Matsukawa, Shin-ichi O'Uchi, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

16.4 Energy-autonomous fever alarm armband integrating fully flexible solar cells, piezoelectric speaker, temperature detector, and 12V organic complementary FET circuits

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

A closed-form expression for estimating minimum operating voltage (VDDmin) of CMOS logic gates

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

Increase of crosstalk noise due to imbalanced threshold voltage between NMOS and PMOS in sub-threshold logic circuits

Takayasu Sakurai, Hiroshi Fuketa, Ryo Takahashi, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

Intermittent resonant clocking enabling power reduction at any clock frequency for 0.37V 980kHz near-threshold logic circuits

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Adaptive performance compensation with in-situ timing error prediction for subthreshold circuits

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2009, 2009 IEEE Custom Integrated Circuits Conference.

Neural ODE with Temporal Convolution and Time Delay Neural Networks for Small-Footprint Keyword Spotting pdf

Hiroshi Fuketa, Yukinori Morita, 2020, ArXiv.

An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2009, IEICE Trans. Electron..

Fully Integrated, 100-mV Minimum Input Voltage Converter With Gate-Boosted Charge Pump Kick-Started by LC Oscillator for Energy Harvesting

Hiroshi Fuketa, Takashi Matsukawa, Shin-ichi O'Uchi, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

Insole Pedometer With Piezoelectric Energy Harvester and 2 V Organic Circuits

Hiroshi Toshiyoshi, Takao Someya, Takayasu Sakurai, 2013, IEEE Journal of Solid-State Circuits.

Investigation of determinant factors of minimum operating voltage of logic gates in 65-nm CMOS

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2011, IEEE/ACM International Symposium on Low Power Electronics and Design.

A Closed-Form Expression for Minimum Operating Voltage of CMOS D Flip-Flop

Hiroshi Fuketa, Takashi Matsukawa, Shin-ichi O’uchi, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Adaptive Performance Compensation With In-Situ Timing Error Predictive Sensors for Subthreshold Circuits

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in VDDmin limited ultra low voltage logic circuits

Takayasu Sakurai, Yu Pu, Hiroshi Fuketa, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

Adaptive performance compensation with on-chip variation monitoring

Masanori Hashimoto, Hiroshi Fuketa, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

30.3 Organic-transistor-based 2kV ESD-tolerant flexible wet sensor sheet for biomedical applications with wireless power and data transmission using 13.56MHz magnetic resonance

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

Large Within-Die Gate Delay Variations in Sub-Threshold Logic Circuits at Low Temperature

Takayasu Sakurai, Hiroshi Fuketa, Ryo Takahashi, 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

Variation-Tolerant Quick-Start-Up CMOS Crystal Oscillator With Chirp Injection and Negative Resistance Booster

Takayasu Sakurai, Hiroshi Fuketa, Shunta Iguchi, 2016, IEEE Journal of Solid-State Circuits.

Design Guidelines of Steep Subthreshold TFET to Minimize Energy of Logic Circuits

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2014 .

On-Chip Measurement System for Within-Die Delay Variation of Individual Standard Cells in 65-nm CMOS

Takayasu Sakurai, Hiroshi Fuketa, Koichi Ishida, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Session 15 overview: Innovations in technologies and circuits

Hiroshi Fuketa, Jan Genoe, Eugenio Cantatore, 2017, ISSCC.

Adaptive performance control with embedded timing error predictive sensors for subthreshold circuits

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

Minimizing Energy of Integer Unit by Higher Voltage Flip-Flop: $V_{\rm DDmin}$-Aware Dual Supply Voltage Technique

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

248pW, 0.11mV/°C glitch-free programmable voltage detector with multiple voltage duplicator for energy harvesting

Hiroki Morimura, Takayasu Sakurai, Hiroshi Fuketa, 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).

Image-Classifier Deep Convolutional Neural Network Training by 9-bit Dedicated Hardware to Realize Validation Accuracy and Energy Efficiency Superior to the Half Precision Floating Point Format

Ryousei Takano, Tomohiro Kudoh, Hiroshi Fuketa, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Edge Artificial Intelligence Chips for the Cyberphysical Systems Era

Hiroshi Fuketa, Kunio Uchiyama, H. Fuketa, 2021, Computer.

Insole pedometer with piezoelectric energy harvester and 2V organic digital and analog circuits

Hiroshi Toshiyoshi, Takao Someya, Takayasu Sakurai, 2012, 2012 IEEE International Solid-State Circuits Conference.

13% Power reduction in 16b integer unit in 40nm CMOS by adaptive power supply voltage control with parity-based error prediction and detection (PEPD) and fully integrated digital LDO

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2012, 2012 IEEE International Solid-State Circuits Conference.

Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near/Sub-Threshold Logic Circuits

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2014, IEEE Journal of Solid-State Circuits.

Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2009 .

Design and Analysis of Ultra-Low Power Glitch-Free Programmable Voltage Detector Based on Multiple Voltage Copier

Hiroki Morimura, Takayasu Sakurai, Hiroshi Fuketa, 2017, IEICE Trans. Electron..

Optimal design to maximize efficiency of single-inductor multiple-output buck converters in discontinuous conduction mode for IoT applications

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2015, 2015 International Conference on IC Design & Technology (ICICDT).

Analysis to optimize sensitivity of RF energy harvester with voltage boost circuit

Hiroki Morimura, Dan Luo, Takayasu Sakurai, 2015, 2015 European Conference on Circuit Theory and Design (ECCTD).

Large-area and flexible sensors with organic transistors

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2013, 5th IEEE International Workshop on Advances in Sensors and Interfaces IWASI.

Correlation verification between transistor variability model with body biasing and ring oscillation frequency in 90nm subthreshold circuits

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2008, Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08).

Reducing IR drop in 3D integration to less than 1/4 using Buck Converter on Top die (BCT) scheme

Futoshi Furuta, Kenichi Osada, Kenichi Takeda, 2013, International Symposium on Quality Electronic Design (ISQED).

An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion

Masanori Hashimoto, Takao Onoye, Hiroshi Fuketa, 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

Robust and compact key generator using physically unclonable function based on logic-transistor-compatible poly-crystalline-Si channel FinFET technology

Yohei Hori, Hiroshi Fuketa, Takashi Matsukawa, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Experimental study on body-biasing layout style-- negligible area overhead enables sufficient speed controllability --

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2008, GLSVLSI '08.

An 85-mV input, 50-µs startup fully integrated voltage multiplier with passive clock boost using on-chip transformers for energy harvesting

Atsushi Okamoto, Takayasu Sakurai, Hiroshi Fuketa, 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).

Increase of Crosstalk Noise Due to Imbalanced Threshold Voltage Between nMOS and pMOS in Subthreshold Logic Circuits

Takayasu Sakurai, Hiroshi Fuketa, Ryo Takahashi, 2013, IEEE Journal of Solid-State Circuits.

Transistor Variability Modeling and its Validation With Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Improvement and Applications of Large-Area Flexible Electronics with Organic Transistors

Hiroshi Toshiyoshi, Takao Someya, Takayasu Sakurai, 2014 .

Ultra-low Power Human Motion Detection Sensor using Electrostatic Induction and Demonstration of Contactless Remote Light Switch

Hiroshi Fuketa, Yukinori Morita, Y. Morita, 2019, 2019 IEEE 8th Global Conference on Consumer Electronics (GCCE).

1 $\mu$m-Thickness Ultra-Flexible and High Electrode-Density Surface Electromyogram Measurement Sheet With 2 V Organic Transistors for Prosthetic Hand Control

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2014, IEEE Transactions on Biomedical Circuits and Systems.

1µm-thickness 64-channel surface electromyogram measurement sheet with 2V organic transistors for prosthetic hand control

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

12.7-times energy efficiency increase of 16-bit integer unit by power supply voltage (VDD) scaling from 1.2V to 310mV enabled by contention-less flip-flops (CLFF) and separated VDD between flip-flops and combinational logics

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2011, IEEE/ACM International Symposium on Low Power Electronics and Design.

Ultra-Low Power Hand Gesture Sensor Using Electrostatic Induction

Hiroshi Fuketa, H. Fuketa, 2021, Sensors.

Time-Delay-Neural-Network-Based Audio Feature Extractor for Ultra-Low Power Keyword Spotting

Hiroshi Fuketa, 2022, IEEE Transactions on Circuits and Systems II: Express Briefs.

Alpha-particle-induced soft errors and multiple cell upsets in 65-nm 10T subthreshold SRAM

Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, 2010, 2010 IEEE International Reliability Physics Symposium.

High‐Frequency, Conformable Organic Amplifiers

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2016, Advanced materials.

Embedded planar power inductor technology for package-level DC power grid

Takayasu Sakurai, Hiroshi Fuketa, Makoto Takamiya, 2015, 2015 International Conference on Electronic Packaging and iMAPS All Asia Conference (ICEP-IAAC).

International Solid-State Circuits Conference ISSCC 2013 / SESSION 6 / EMERGING MEDICAL AND SENSOR TECHNOLOGIES / 6 . 4 6 . 4 1 μ m-Thickness 64-Channel Surface Electromyogram Measurement Sheet with 2 V Organic Transistors for Prosthetic Hand Control

Takao Someya, Takayasu Sakurai, Hiroshi Fuketa, 2013 .

Closed-form analytical model of static noise margin for ultra-low voltage eight-transistor tunnel FET static random access memory

Hiroshi Fuketa, Takashi Matsukawa, Meishoku Masahara, 2016 .

Measurement and Analysis of Alpha-Particle-Induced Soft Errors and Multiple-Cell Upsets in 10T Subthreshold SRAM

Masanori Hashimoto, Takao Onoye, Hiroshi Fuketa, 2014, IEEE Transactions on Device and Materials Reliability.

Zero phase difference capacitance control (ZPDCC) for magnetically resonant wireless power transmission

Takayasu Sakurai, Hiroshi Fuketa, Koichi Ishida, 2013, 2013 IEEE Wireless Power Transfer (WPT).